Re: [Qemu-devel] [PATCH v1 24/30] RISC-V: Fix PLIC pending bitfield reads

[Alistair Francis]

On Tue, May 22, 2018 at 5:15 PM, Michael Clark <address@hidden> wrote:
> The address calculation for the pending bitfield had
> a copy paste bug. This bug went unnoticed because the Linux
> PLIC driver does not read the pending bitfield, rather it
> reads pending interrupt numbers from the claim register
> and writes acknowledgements back to the claim register.
>
> Cc: Palmer Dabbelt <address@hidden>
> Cc: Sagar Karandikar <address@hidden>
> Cc: Bastian Koppelmann <address@hidden>
> Cc: Alistair Francis <address@hidden>
> Reported-by: Vincent Siles <address@hidden>
> Signed-off-by: Michael Clark <address@hidden>

Reviewed-by: Alistair Francis <address@hidden>

Alistair

> ---
>  hw/riscv/sifive_plic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
> index 28e28d932f7c..b81d29faff99 100644
> --- a/hw/riscv/sifive_plic.c
> +++ b/hw/riscv/sifive_plic.c
> @@ -215,7 +215,7 @@ static uint64_t sifive_plic_read(void *opaque, hwaddr 
> addr, unsigned size)
>      } else if (addr >= plic->pending_base && /* 1 bit per source */
>                 addr < plic->pending_base + (plic->num_sources >> 3))
>      {
> -        uint32_t word = (addr - plic->priority_base) >> 2;
> +        uint32_t word = (addr - plic->pending_base) >> 2;
>          if (RISCV_DEBUG_PLIC) {
>              qemu_log("plic: read pending: word=%d value=%d\n",
>                  word, plic->pending[word]);
> --
> 2.7.0
>
>