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[Qemu-devel] [PULL 19/43] target/arm: Extend vec_reg_offset to larger si
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 19/43] target/arm: Extend vec_reg_offset to larger sizes |
Date: |
Fri, 15 Jun 2018 15:24:57 +0100 |
From: Richard Henderson <address@hidden>
Rearrange the arithmetic so that we are agnostic about the total size
of the vector and the size of the element. This will allow us to index
up to the 32nd byte and with 16-byte elements.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate-a64.h | 26 +++++++++++++++++---------
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/target/arm/translate-a64.h b/target/arm/translate-a64.h
index dd9c09f89b9..63d958cf504 100644
--- a/target/arm/translate-a64.h
+++ b/target/arm/translate-a64.h
@@ -67,18 +67,26 @@ static inline void assert_fp_access_checked(DisasContext *s)
static inline int vec_reg_offset(DisasContext *s, int regno,
int element, TCGMemOp size)
{
- int offs = 0;
+ int element_size = 1 << size;
+ int offs = element * element_size;
#ifdef HOST_WORDS_BIGENDIAN
/* This is complicated slightly because vfp.zregs[n].d[0] is
- * still the low half and vfp.zregs[n].d[1] the high half
- * of the 128 bit vector, even on big endian systems.
- * Calculate the offset assuming a fully bigendian 128 bits,
- * then XOR to account for the order of the two 64 bit halves.
+ * still the lowest and vfp.zregs[n].d[15] the highest of the
+ * 256 byte vector, even on big endian systems.
+ *
+ * Calculate the offset assuming fully little-endian,
+ * then XOR to account for the order of the 8-byte units.
+ *
+ * For 16 byte elements, the two 8 byte halves will not form a
+ * host int128 if the host is bigendian, since they're in the
+ * wrong order. However the only 16 byte operation we have is
+ * a move, so we can ignore this for the moment. More complicated
+ * operations will have to special case loading and storing from
+ * the zregs array.
*/
- offs += (16 - ((element + 1) * (1 << size)));
- offs ^= 8;
-#else
- offs += element * (1 << size);
+ if (element_size < 8) {
+ offs ^= 8 - element_size;
+ }
#endif
offs += offsetof(CPUARMState, vfp.zregs[regno]);
assert_fp_access_checked(s);
--
2.17.1
- [Qemu-devel] [PULL 04/43] hw/m68k/mcf5206: Convert away from old_mmio, (continued)
- [Qemu-devel] [PULL 04/43] hw/m68k/mcf5206: Convert away from old_mmio, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 15/43] CODING_STYLE: Define our preferred form for multiline comments, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 09/43] stellaris: Stop using armv7m_init(), Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 23/43] target/arm: Implement SVE compress active elements, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 06/43] hw/watchdog/wdt_i6300esb: Convert away from old_mmio, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 12/43] hw/core/or-irq: Support more than 16 inputs to an OR gate, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 01/43] arm_gicv3_kvm: kvm_dist_get/put_priority: skip the registers banked by GICR_IPRIORITYR, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 14/43] cputlb: Pass cpu_transaction_failed() the correct physaddr, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 21/43] target/arm: Implement SVE Permute - Predicates Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 18/43] exec.c: Use stn_p() and ldn_p() instead of explicit switches, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 19/43] target/arm: Extend vec_reg_offset to larger sizes,
Peter Maydell <=
- [Qemu-devel] [PULL 03/43] hw/sh/sh7750: Convert away from old_mmio, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 20/43] target/arm: Implement SVE Permute - Unpredicated Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 25/43] target/arm: Implement SVE copy to vector (predicated), Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 24/43] target/arm: Implement SVE conditionally broadcast/extract element, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 02/43] hw/arm/mps2-tz: Put ethernet controller behind PPC, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 26/43] target/arm: Implement SVE reverse within elements, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 30/43] target/arm: Implement SVE Integer Compare - Immediate Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 33/43] target/arm: Implement SVE Integer Compare - Scalars Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 34/43] target/arm: Implement FDUP/DUP, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 31/43] target/arm: Implement SVE Partition Break Group, Peter Maydell, 2018/06/15