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Re: [Qemu-devel] [PATCH 4/6] target/arm: Prune a15 features from max
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCH 4/6] target/arm: Prune a15 features from max |
Date: |
Thu, 28 Jun 2018 21:39:52 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 |
On 06/28/2018 09:15 PM, Richard Henderson wrote:
> There is no need to re-set these 3 features already
> implied by the call to aarch64_a15_initfn.
>
> Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> target/arm/cpu.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index aa62315cea..878cc6c7e8 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1796,9 +1796,6 @@ static void arm_max_initfn(Object *obj)
> * since we don't correctly set the ID registers to advertise them,
> */
> set_feature(&cpu->env, ARM_FEATURE_V8);
> - set_feature(&cpu->env, ARM_FEATURE_VFP4);
> - set_feature(&cpu->env, ARM_FEATURE_NEON);
> - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE);
> set_feature(&cpu->env, ARM_FEATURE_V8_AES);
> set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
> set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
>
- Re: [Qemu-devel] [PATCH 1/6] target/arm: Fix SVE signed division vs x86 overflow exception, (continued)
[Qemu-devel] [PATCH 2/6] target/arm: Fix SVE system register access checks, Richard Henderson, 2018/06/28
[Qemu-devel] [PATCH 3/6] target/arm: Prune a57 features from max, Richard Henderson, 2018/06/28
[Qemu-devel] [PATCH 4/6] target/arm: Prune a15 features from max, Richard Henderson, 2018/06/28
[Qemu-devel] [PATCH 5/6] target/arm: Add ID_ISAR6, Richard Henderson, 2018/06/28
[Qemu-devel] [PATCH 6/6] target/arm: Set ISAR bits for -cpu max, Richard Henderson, 2018/06/28