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[Qemu-devel] [PATCH v6 04/77] target/mips: Fix two instances of shadow v
From: |
Stefan Markovic |
Subject: |
[Qemu-devel] [PATCH v6 04/77] target/mips: Fix two instances of shadow variables |
Date: |
Thu, 2 Aug 2018 16:15:51 +0200 |
From: Aleksandar Markovic <address@hidden>
Fix two instances of shadow variables. This cleans up entire file
translate.c from shadow variables.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
target/mips/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e32fd5f..d6eccc9 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -13247,7 +13247,7 @@ static void gen_pool16c_r6_insn(DisasContext *ctx)
gen_arith_imm(ctx, OPC_ADDIU, 29, 29, imm << 2);
} else {
/* JRC16 */
- int rs = extract32(ctx->opcode, 5, 5);
+ rs = extract32(ctx->opcode, 5, 5);
gen_compute_branch(ctx, OPC_JR, 2, rs, 0, 0, 0);
}
break;
@@ -15249,7 +15249,7 @@ static void decode_micromips32_opc(CPUMIPSState *env,
DisasContext *ctx)
} else {
/* ADDIUPC */
int reg = mmreg(ZIMM(ctx->opcode, 23, 3));
- int offset = SIMM(ctx->opcode, 0, 23) << 2;
+ offset = SIMM(ctx->opcode, 0, 23) << 2;
gen_addiupc(ctx, reg, offset, 0, 0);
}
--
1.9.1
- [Qemu-devel] [PATCH v6 00/77] Add nanoMIPS support to QEMU, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 01/77] MAINTAINERS: Update target/mips maintainer's email addresses, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 02/77] target/mips: Avoid case statements formulated by ranges, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 03/77] target/mips: Mark switch fallthroughs with interpretable comments, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 04/77] target/mips: Fix two instances of shadow variables,
Stefan Markovic <=
- [Qemu-devel] [PATCH v6 05/77] target/mips: Update some CP0 registers bit definitions, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 06/77] target/mips: Add CP0 BadInstrX register, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 07/77] target/mips: Add gen_op_addr_addi(), Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 08/77] target/mips: Don't update BadVAddr register in Debug Mode, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 09/77] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 10/77] elf: Remove duplicate preprocessor constant definition, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 11/77] elf: Add ELF flags for MIPS machine variants, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 12/77] linux-user: Update MIPS syscall numbers up to kernel 4.18 headers, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 13/77] linux-user: Add preprocessor availability control to some syscalls, Stefan Markovic, 2018/08/02
- [Qemu-devel] [PATCH v6 14/77] target/mips: Add preprocessor constants for nanoMIPS, Stefan Markovic, 2018/08/02