[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 00/20] target/arm: sve system mode patches
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 00/20] target/arm: sve system mode patches |
Date: |
Wed, 8 Aug 2018 21:21:46 -0700 |
This is my current set of patches for running SVE in system mode.
The first half deal with the system registers that affect SVE.
I recall that Peter has said he'd like the first patch to be
done a different way, but we haven't had a chance to talk about
what form it should take. I've left it as-is since it does what
I need for now.
The second half re-implement the SVE memory operations.
The FF and NF loads had been stubbed out. Getting those to work
requires some infrastructure that can be reused to speed up normal
loads -- one guest-to-host tlb lookup can be reused for the rest
of the page.
r~
Based-on: <address@hidden>
Richard Henderson (20):
target/arm: Set ISAR bits for -cpu max
target/arm: Set ID_AA64PFR0 bits for SVE for -cpu max
target/arm: Define ID_AA64ZFR0_EL1
target/arm: Adjust sve_exception_el
target/arm: Fix arm_cpu_data_is_big_endian for aa64 user-only
target/arm: Fix arm_current_el for user-only
target/arm: Fix is_a64 for user-only
target/arm: Pass in current_el to fp and sve_exception_el
target/arm: Handle SVE vector length changes in system mode
target/arm: Adjust aarch64_cpu_dump_state for system mode SVE
target/arm: Clear unused predicate bits for LD1RQ
target/arm: Rewrite helper_sve_ld1*_r using pages
target/arm: Rewrite helper_sve_ld[234]*_r
target/arm: Rewrite helper_sve_st[1234]*_r
target/arm: Split contiguous loads for endianness
target/arm: Split contiguous stores for endianness
target/arm: Rewrite vector gather loads
target/arm: Rewrite vector gather stores
target/arm: Rewrite vector gather first-fault loads
target/arm: Pass TCGMemOpIdx to sve memory helpers
target/arm/cpu.h | 47 +-
target/arm/helper-sve.h | 385 +++++--
target/arm/internals.h | 5 +
target/arm/cpu.c | 24 +-
target/arm/cpu64.c | 93 +-
target/arm/helper.c | 237 +++--
target/arm/op_helper.c | 1 +
target/arm/sve_helper.c | 2062 +++++++++++++++++++++++++-----------
target/arm/translate-a64.c | 8 +-
target/arm/translate-sve.c | 670 ++++++++----
10 files changed, 2453 insertions(+), 1079 deletions(-)
--
2.17.1
- [Qemu-devel] [PATCH 00/20] target/arm: sve system mode patches,
Richard Henderson <=
- [Qemu-devel] [PATCH 01/20] target/arm: Set ISAR bits for -cpu max, Richard Henderson, 2018/08/09
- [Qemu-devel] [PATCH 03/20] target/arm: Define ID_AA64ZFR0_EL1, Richard Henderson, 2018/08/09
- [Qemu-devel] [PATCH 02/20] target/arm: Set ID_AA64PFR0 bits for SVE for -cpu max, Richard Henderson, 2018/08/09
- [Qemu-devel] [PATCH 04/20] target/arm: Adjust sve_exception_el, Richard Henderson, 2018/08/09
- [Qemu-devel] [PATCH 05/20] target/arm: Fix arm_cpu_data_is_big_endian for aa64 user-only, Richard Henderson, 2018/08/09
- [Qemu-devel] [PATCH 06/20] target/arm: Fix arm_current_el for user-only, Richard Henderson, 2018/08/09