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Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes
From: |
Janeczek, Craig |
Subject: |
Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes |
Date: |
Tue, 28 Aug 2018 18:54:13 +0000 |
I will re-work each of the mxu_gen_<ins> functions to check for MXUEN and jump
over the implementation of the instruction if not enabled.
I would like to clarify the structure of the switch statement before
implementing it.
I was originally planning on checking if there was a MXU hit and MXUEN was set,
in that case use the MXU instruction, else use the original switch. This will
not work as MXUEN is in a TCGv and cant be used in an if statement at that
level. That is why I plan on putting the MXUEN check in each of the
mxu_gen_<ins> functions.
What should the re-worked switch statement look like which runs the
mxu_gen_<ins> functions?
-----Original Message-----
From: Aleksandar Markovic <address@hidden>
Sent: Tuesday, August 28, 2018 12:51 PM
To: Janeczek, Craig <address@hidden>; address@hidden
Cc: address@hidden
Subject: Re: [PATCH v3 2/8] target/mips: Add all MXU opcodes
> I see that I can check the loongson instructions by checking for
> INSN_LOONGSON2F. Using MXU if that is not set
One more thing to check is MXUEN bit of MXU control register. This should be
done before handling any MXU instructions, except S32M2I/S32I2M.
> What should I check for the mult or misc instructions that were there first?
It should be is somewhere in LOONGSON docs.
- Re: [Qemu-devel] [PATCH v3 3/8] target/mips: Add MXU instructions S32I2M and S32M2I, (continued)
- Re: [Qemu-devel] [PATCH v3 3/8] target/mips: Add MXU instructions S32I2M and S32M2I, Janeczek, Craig, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 3/8] target/mips: Add MXU instructions S32I2M and S32M2I, Aleksandar Markovic, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 3/8] target/mips: Add MXU instructions S32I2M and S32M2I, Janeczek, Craig, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 3/8] target/mips: Add MXU instructions S32I2M and S32M2I, Aleksandar Markovic, 2018/08/28
[Qemu-devel] [PATCH v3 6/8] target/mips: Add MXU instruction D16MAC, Craig Janeczek, 2018/08/28
[Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes, Craig Janeczek, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes, Aleksandar Markovic, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes, Janeczek, Craig, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes, Aleksandar Markovic, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes,
Janeczek, Craig <=
- Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes, Aleksandar Markovic, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes, Janeczek, Craig, 2018/08/28
- Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes, Aleksandar Markovic, 2018/08/28
[Qemu-devel] [PATCH v3 1/8] target/mips: Introduce MXU registers, Craig Janeczek, 2018/08/28
[Qemu-devel] [PATCH v3 7/8] target/mips: Add MXU instructions Q8MUL and Q8MULSU, Craig Janeczek, 2018/08/28
[Qemu-devel] [PATCH v3 5/8] target/mips: Add MXU instruction D16MUL, Craig Janeczek, 2018/08/28
[Qemu-devel] [PATCH v3 8/8] target/mips: Add MXU instructions S32LDD and S32LDDR, Craig Janeczek, 2018/08/28
Re: [Qemu-devel] [PATCH v3 0/8] Add limited MXU instruction support, Aleksandar Markovic, 2018/08/29