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[Qemu-devel] [PULL 31/33] target/arm: Add v8M stack checks for VLDM/VSTM
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 31/33] target/arm: Add v8M stack checks for VLDM/VSTM |
Date: |
Mon, 8 Oct 2018 15:00:02 +0100 |
Add the v8M stack checks for the VLDM/VSTM
(aka VPUSH/VPOP) instructions. This code is currently
unreachable because we haven't yet implemented M profile
floating point support, but since the change is simple,
we add it now because otherwise we're likely to forget to
do it later.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
target/arm/translate.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index ef64d2559de..1b4bacb522b 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -4229,6 +4229,18 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
if (insn & (1 << 24)) /* pre-decrement */
tcg_gen_addi_i32(addr, addr, -((insn & 0xff) << 2));
+ if (s->v8m_stackcheck && rn == 13 && w) {
+ /*
+ * Here 'addr' is the lowest address we will store to,
+ * and is either the old SP (if post-increment) or
+ * the new SP (if pre-decrement). For post-increment
+ * where the old value is below the limit and the new
+ * value is above, it is UNKNOWN whether the limit check
+ * triggers; we choose to trigger.
+ */
+ gen_helper_v8m_stackcheck(cpu_env, addr);
+ }
+
if (dp)
offset = 8;
else
--
2.19.0
- [Qemu-devel] [PULL 17/33] target/arm: Rewrite vector gather stores, (continued)
- [Qemu-devel] [PULL 17/33] target/arm: Rewrite vector gather stores, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 18/33] target/arm: Rewrite vector gather first-fault loads, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 22/33] target/arm: Move v7m_using_psp() to internals.h, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 10/33] target/arm: Clear unused predicate bits for LD1RQ, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 09/33] target/arm: Adjust aarch64_cpu_dump_state for system mode SVE, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 23/33] target/arm: Add v8M stack checks on ADD/SUB/MOV of SP, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 08/33] target/arm: Handle SVE vector length changes in system mode, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 13/33] target/arm: Rewrite helper_sve_st[1234]*_r, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 32/33] target/arm: Add v8M stack checks for MSR to SP_NS, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 33/33] hw/display/bcm2835_fb: Silence Coverity warning about multiply overflow, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 31/33] target/arm: Add v8M stack checks for VLDM/VSTM,
Peter Maydell <=
- [Qemu-devel] [PULL 29/33] target/arm: Add v8M stack checks for T32 load/store single, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 30/33] target/arm: Add v8M stack checks for Thumb push/pop, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 24/33] target/arm: Add some comments in Thumb decode, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 25/33] target/arm: Add v8M stack checks on exception entry, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 28/33] target/arm: Add v8M stack checks for Thumb2 LDM/STM, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 27/33] target/arm: Add v8M stack checks for LDRD/STRD (imm), Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 26/33] target/arm: Add v8M stack limit checks on NS function calls, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 03/33] target/arm: Correct condition for v8M callee stack push, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 06/33] target/arm: Adjust sve_exception_el, Peter Maydell, 2018/10/08
- [Qemu-devel] [PULL 05/33] target/arm: Define ID_AA64ZFR0_EL1, Peter Maydell, 2018/10/08