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[Qemu-devel] [PULL 03/10] riscv: Enable VGA and PCIE_VGA
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [PULL 03/10] riscv: Enable VGA and PCIE_VGA |
Date: |
Thu, 11 Oct 2018 20:31:46 +0000 |
Enable compile support for VGA devices. This allows the user to conenct
a display by adding '-device bochs-display -display sdl' to their
command line argument.
Signed-off-by: Alistair Francis <address@hidden>
---
default-configs/riscv32-softmmu.mak | 3 +++
default-configs/riscv64-softmmu.mak | 3 +++
hw/riscv/virt.c | 4 ++--
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/default-configs/riscv32-softmmu.mak
b/default-configs/riscv32-softmmu.mak
index 3e3d195f37..05fae82f1b 100644
--- a/default-configs/riscv32-softmmu.mak
+++ b/default-configs/riscv32-softmmu.mak
@@ -9,3 +9,6 @@ CONFIG_CADENCE=y
CONFIG_PCI_GENERIC=y
CONFIG_PCI_XILINX=y
+
+CONFIG_VGA=y
+CONFIG_VGA_PCI=y
diff --git a/default-configs/riscv64-softmmu.mak
b/default-configs/riscv64-softmmu.mak
index 3e3d195f37..05fae82f1b 100644
--- a/default-configs/riscv64-softmmu.mak
+++ b/default-configs/riscv64-softmmu.mak
@@ -9,3 +9,6 @@ CONFIG_CADENCE=y
CONFIG_PCI_GENERIC=y
CONFIG_PCI_XILINX=y
+
+CONFIG_VGA=y
+CONFIG_VGA_PCI=y
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 9bd2c10581..62a953aa2b 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -437,8 +437,8 @@ static void riscv_virt_board_init(MachineState *machine)
}
gpex_pcie_init(system_memory, 0, memmap[VIRT_PCIE].base,
- memmap[VIRT_PCIE].size, 0x40000000, 0x20000000,
- qdev_get_gpio_in(DEVICE(s->plic), PCIE_IRQ), true);
+ memmap[VIRT_PCIE].size, 0x40000000, 0x20000000,
+ qdev_get_gpio_in(DEVICE(s->plic), PCIE_IRQ), true);
serial_mm_init(system_memory, memmap[VIRT_UART0].base,
0, qdev_get_gpio_in(DEVICE(s->plic), UART0_IRQ), 399193,
--
2.17.1
- [Qemu-devel] [PULL 00/10] riscv-pullreq queue, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 01/10] hw/riscv/virt: Increase the number of interrupts, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 03/10] riscv: Enable VGA and PCIE_VGA,
Alistair Francis <=
- [Qemu-devel] [PULL 02/10] hw/riscv/virt: Connect the gpex PCIe, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 05/10] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 06/10] RISC-V: Allow setting and clearing multiple irqs, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 08/10] RISC-V: Update CSR and interrupt definitions, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 07/10] RISC-V: Move non-ops from op_helper to cpu_helper, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 04/10] hw/riscv/sifive_u: Connect the Xilinx PCIe, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 09/10] RISC-V: Add missing free for plic_hart_config, Alistair Francis, 2018/10/11
- [Qemu-devel] [PULL 10/10] RISC-V: Don't add NULL bootargs to device-tree, Alistair Francis, 2018/10/11