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Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-ope
From: |
Maciej W. Rozycki |
Subject: |
Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU |
Date: |
Tue, 16 Oct 2018 20:02:03 +0100 (BST) |
User-agent: |
Alpine 2.21 (LFD 202 2017-01-01) |
On Tue, 16 Oct 2018, Fredrik Noring wrote:
> > I would not implement r5900 for mips32 in that case,
> > I would implement it only for TARGET_MIPS64.
>
> R5900 Linux implements the O32 ABI, which is why 32-bit QEMU user-mode is
> very useful. Perhaps a better alternative is to define the MMI registers
> as 128-bit, similar to
>
> static TCGv_u128 mmi_gpr[32];
>
> and then copy cpu_gpr to/from mmi_gpr as needed when running the MMIs?
FWIW, I agree as far as the user emulation mode is concerned. All 64-bit
MIPS hardware is currently set up by the Linux kernel for 64-bit execution
by keeping CP0.Status.UX set when running o32 user processes anyway.
A change to this policy (and also the use of CP0.Status.PX for n32) has
been discussed, in partictular in the course of investigating address
space overflows caused by GCC using the indexed addressing modes under the
assumption that the address space wraps at 32 bits for o32 and n32
software, where indeed it does not. No change has been implemented
though.
Maciej
- [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Philippe Mathieu-Daudé, 2018/10/14
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/14
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Philippe Mathieu-Daudé, 2018/10/14
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Maciej W. Rozycki, 2018/10/14
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/15
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Aleksandar Markovic, 2018/10/16
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/16
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Richard Henderson, 2018/10/16
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/16
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU,
Maciej W. Rozycki <=
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Aleksandar Markovic, 2018/10/19
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Aleksandar Markovic, 2018/10/28
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Maciej W. Rozycki, 2018/10/28
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Aleksandar Markovic, 2018/10/29
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/29
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Aleksandar Markovic, 2018/10/29
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Maciej W. Rozycki, 2018/10/29
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Maciej W. Rozycki, 2018/10/16
- Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/15
Re: [Qemu-devel] [PATCH] target/mips: Support Toshiba specific three-operand MADD and MADDU, Fredrik Noring, 2018/10/24