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[Qemu-devel] [PATCH v5 03/14] target/mips: Add and integrate MXU decodin
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v5 03/14] target/mips: Add and integrate MXU decoding engine placeholder |
Date: |
Fri, 19 Oct 2018 18:33:37 +0200 |
From: Aleksandar Markovic <address@hidden>
Provide the placeholder and add the invocation logic for MXU
decoding engine.
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/translate.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index ef7ad62..dc72f76 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -23311,6 +23311,12 @@ static void decode_opc_special(CPUMIPSState *env,
DisasContext *ctx)
}
}
+static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx)
+{
+ MIPS_INVAL("decode_opc_mxu");
+ generate_exception_end(ctx, EXCP_RI);
+}
+
static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
{
int rs, rt, rd;
@@ -25292,7 +25298,11 @@ static void decode_opc(CPUMIPSState *env, DisasContext
*ctx)
decode_opc_special(env, ctx);
break;
case OPC_SPECIAL2:
- decode_opc_special2_legacy(env, ctx);
+ if (ctx->insn_flags & ASE_MXU) {
+ decode_opc_mxu(env, ctx);
+ } else {
+ decode_opc_special2_legacy(env, ctx);
+ }
break;
case OPC_SPECIAL3:
decode_opc_special3(env, ctx);
--
2.7.4
- [Qemu-devel] [PATCH v5 00/14] Add limited MXU instruction support, Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 01/14] target/mips: Introduce MXU registers, Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 02/14] target/mips: Define a bit for MXU in insn_flags, Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 03/14] target/mips: Add and integrate MXU decoding engine placeholder,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v5 04/14] target/mips: Add MXU decoding engine, Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 05/14] target/mips: Add bit encoding for MXU add/subtract patterns 'aptn2', Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 08/14] target/mips: Add emulation of non-MXU MULL within MXU decoding engine, Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 14/14] target/mips: Add emulation of MXU instructions S32LDD and S32LDDR, Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 07/14] target/mips: Add bit encoding for MXU operand getting patterns 'optn3', Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 06/14] target/mips: Add bit encoding for MXU operand getting patterns 'optn2', Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 10/14] target/mips: Add emulation of MXU instruction S8LDD, Aleksandar Markovic, 2018/10/19
- [Qemu-devel] [PATCH v5 11/14] target/mips: Add emulation of MXU instruction D16MUL, Aleksandar Markovic, 2018/10/19