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[Qemu-devel] [PULL v2 15/33] target/mips: Add a placeholder for R5900 MM
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v2 15/33] target/mips: Add a placeholder for R5900 MMI3 instruction subclass |
Date: |
Wed, 24 Oct 2018 15:40:29 +0200 |
From: Fredrik Noring <address@hidden>
Add a placeholder for MMI3 subclass.
Reviewed-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Fredrik Noring <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
target/mips/translate.c | 31 ++++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index cc00429..1c0400c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -24527,6 +24527,33 @@ static void decode_tx79_mmi2(CPUMIPSState *env,
DisasContext *ctx)
}
}
+static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
+{
+ uint32_t opc = MASK_TX79_MMI3(ctx->opcode);
+
+ switch (opc) {
+ case TX79_MMI3_PMADDUW: /* TODO: TX79_MMI3_PMADDUW */
+ case TX79_MMI3_PSRAVW: /* TODO: TX79_MMI3_PSRAVW */
+ case TX79_MMI3_PMTHI: /* TODO: TX79_MMI3_PMTHI */
+ case TX79_MMI3_PMTLO: /* TODO: TX79_MMI3_PMTLO */
+ case TX79_MMI3_PINTEH: /* TODO: TX79_MMI3_PINTEH */
+ case TX79_MMI3_PMULTUW: /* TODO: TX79_MMI3_PMULTUW */
+ case TX79_MMI3_PDIVUW: /* TODO: TX79_MMI3_PDIVUW */
+ case TX79_MMI3_PCPYUD: /* TODO: TX79_MMI3_PCPYUD */
+ case TX79_MMI3_POR: /* TODO: TX79_MMI3_POR */
+ case TX79_MMI3_PNOR: /* TODO: TX79_MMI3_PNOR */
+ case TX79_MMI3_PEXCH: /* TODO: TX79_MMI3_PEXCH */
+ case TX79_MMI3_PCPYH: /* TODO: TX79_MMI3_PCPYH */
+ case TX79_MMI3_PEXCW: /* TODO: TX79_MMI3_PEXCW */
+ generate_exception_end(ctx, EXCP_RI); /* TODO: TX79_MMI_CLASS_MMI3 */
+ break;
+ default:
+ MIPS_INVAL("TX79 MMI class MMI3");
+ generate_exception_end(ctx, EXCP_RI);
+ break;
+ }
+}
+
static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_TX79_MMI(ctx->opcode);
@@ -24541,6 +24568,9 @@ static void decode_tx79_mmi(CPUMIPSState *env,
DisasContext *ctx)
case TX79_MMI_CLASS_MMI2:
decode_tx79_mmi2(env, ctx);
break;
+ case TX79_MMI_CLASS_MMI3:
+ decode_tx79_mmi3(env, ctx);
+ break;
case TX79_MMI_MADD: /* TODO: TX79_MMI_MADD */
case TX79_MMI_MADDU: /* TODO: TX79_MMI_MADDU */
case TX79_MMI_PLZCW: /* TODO: TX79_MMI_PLZCW */
@@ -24554,7 +24584,6 @@ static void decode_tx79_mmi(CPUMIPSState *env,
DisasContext *ctx)
case TX79_MMI_DIVU1: /* TODO: TX79_MMI_DIVU1 */
case TX79_MMI_MADD1: /* TODO: TX79_MMI_MADD1 */
case TX79_MMI_MADDU1: /* TODO: TX79_MMI_MADDU1 */
- case TX79_MMI_CLASS_MMI3: /* TODO: TX79_MMI_CLASS_MMI3 */
case TX79_MMI_PMFHL: /* TODO: TX79_MMI_PMFHL */
case TX79_MMI_PMTHL: /* TODO: TX79_MMI_PMTHL */
case TX79_MMI_PSLLH: /* TODO: TX79_MMI_PSLLH */
--
2.7.4
- [Qemu-devel] [PULL v2 29/33] tests/tcg/mips: Add tests for R5900 DIVU1, (continued)
- [Qemu-devel] [PULL v2 29/33] tests/tcg/mips: Add tests for R5900 DIVU1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 24/33] tests/tcg/mips: Add tests for R5900 three-operand MULT1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 17/33] target/mips: Support R5900 three-operand MULT1 and MULTU1 instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 23/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 18/33] target/mips: Support R5900 MFLO1, MTLO1, MFHI1 and MTHI1 instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 30/33] target/mips: Define the R5900 CPU, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 26/33] tests/tcg/mips: Add tests for R5900 MFLO1 and MFHI1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 22/33] tests/tcg/mips: Add tests for R5900 three-operand MULT, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 25/33] tests/tcg/mips: Add tests for R5900 three-operand MULTU1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 21/33] target/mips: Make R5900 DMULT[U], DDIV[U], LL[D] and SC[D] user only, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 15/33] target/mips: Add a placeholder for R5900 MMI3 instruction subclass,
Aleksandar Markovic <=
- [Qemu-devel] [PULL v2 19/33] target/mips: Support R5900 DIV1 and DIVU1 instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 28/33] tests/tcg/mips: Add tests for R5900 DIV1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 27/33] tests/tcg/mips: Add tests for R5900 MTLO1 and MTHI1, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 32/33] target/mips: Fix the title of translate.c, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 33/33] target/mips: Fix decoding of ALIGN and DALIGN instructions, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 31/33] linux-user/mips: Recognize the R5900 CPU model, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 07/33] target/mips: Define R5900 MMI2 opcode constants, Aleksandar Markovic, 2018/10/24
- [Qemu-devel] [PULL v2 10/33] target/mips: Add a placeholder for R5900 LQ, Aleksandar Markovic, 2018/10/24
- Re: [Qemu-devel] [PULL v2 00/33] MIPS queue for October 2018 - part 2 - v2, Peter Maydell, 2018/10/24