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[Qemu-devel] [RFC 27/48] target/sh4: prepare for 2-pass translation (WIP


From: Emilio G. Cota
Subject: [Qemu-devel] [RFC 27/48] target/sh4: prepare for 2-pass translation (WIP)
Date: Thu, 25 Oct 2018 13:20:36 -0400

XXX: cleanly get the gUSA instructions

Signed-off-by: Emilio G. Cota <address@hidden>
---
 target/sh4/translate.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index ea88d46c04..a3b0fb46a2 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -2333,6 +2333,7 @@ static void sh4_tr_translate_insn(DisasContextBase 
*dcbase, CPUState *cs,
 #endif
 
     ctx->opcode = cpu_lduw_code(env, ctx->base.pc_next);
+    qemu_plugin_insn_append(plugin_insn, &ctx->opcode, sizeof(ctx->opcode));
     decode_opc(ctx);
     ctx->base.pc_next += 2;
 }
@@ -2381,6 +2382,8 @@ static const TranslatorOps sh4_tr_ops = {
     .translate_insn     = sh4_tr_translate_insn,
     .tb_stop            = sh4_tr_tb_stop,
     .disas_log          = sh4_tr_disas_log,
+    .ctx_base_offset    = offsetof(DisasContext, base),
+    .ctx_size           = sizeof(DisasContext),
 };
 
 void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
-- 
2.17.1




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