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[Qemu-devel] [RFC 28/48] target/i386: prepare for 2-pass translation
From: |
Emilio G. Cota |
Subject: |
[Qemu-devel] [RFC 28/48] target/i386: prepare for 2-pass translation |
Date: |
Thu, 25 Oct 2018 13:20:37 -0400 |
Signed-off-by: Emilio G. Cota <address@hidden>
---
target/i386/translate.c | 35 ++++++++++++++++++++++++++++-------
1 file changed, 28 insertions(+), 7 deletions(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 86e59d7bf7..1d7b20bce3 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -142,6 +142,7 @@ typedef struct DisasContext {
TCGv_i32 tmp3_i32;
TCGv_i64 tmp1_i64;
+ struct qemu_plugin_insn *plugin_insn;
sigjmp_buf jmpbuf;
} DisasContext;
@@ -1900,28 +1901,43 @@ static uint64_t advance_pc(CPUX86State *env,
DisasContext *s, int num_bytes)
static inline uint8_t x86_ldub_code(CPUX86State *env, DisasContext *s)
{
- return cpu_ldub_code(env, advance_pc(env, s, 1));
+ uint8_t ret = cpu_ldub_code(env, advance_pc(env, s, 1));
+
+ qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret));
+ return ret;
}
static inline int16_t x86_ldsw_code(CPUX86State *env, DisasContext *s)
{
- return cpu_ldsw_code(env, advance_pc(env, s, 2));
+ int16_t ret = cpu_ldsw_code(env, advance_pc(env, s, 2));
+
+ qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret));
+ return ret;
}
static inline uint16_t x86_lduw_code(CPUX86State *env, DisasContext *s)
{
- return cpu_lduw_code(env, advance_pc(env, s, 2));
+ uint16_t ret = cpu_lduw_code(env, advance_pc(env, s, 2));
+
+ qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret));
+ return ret;
}
static inline uint32_t x86_ldl_code(CPUX86State *env, DisasContext *s)
{
- return cpu_ldl_code(env, advance_pc(env, s, 4));
+ uint32_t ret = cpu_ldl_code(env, advance_pc(env, s, 4));
+
+ qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret));
+ return ret;
}
#ifdef TARGET_X86_64
static inline uint64_t x86_ldq_code(CPUX86State *env, DisasContext *s)
{
- return cpu_ldq_code(env, advance_pc(env, s, 8));
+ uint64_t ret = cpu_ldq_code(env, advance_pc(env, s, 8));
+
+ qemu_plugin_insn_append(s->plugin_insn, &ret, sizeof(ret));
+ return ret;
}
#endif
@@ -4473,7 +4489,8 @@ static void gen_sse(CPUX86State *env, DisasContext *s,
int b,
/* convert one instruction. s->base.is_jmp is set if the translation must
be stopped. Return the next pc value */
-static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
+static target_ulong disas_insn(DisasContext *s, CPUState *cpu,
+ struct qemu_plugin_insn *plugin_insn)
{
CPUX86State *env = cpu->env_ptr;
int b, prefixes;
@@ -4484,6 +4501,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState
*cpu)
int rex_w, rex_r;
target_ulong pc_start = s->base.pc_next;
+ s->plugin_insn = plugin_insn;
+
s->pc_start = s->pc = pc_start;
s->override = -1;
#ifdef TARGET_X86_64
@@ -8529,7 +8548,7 @@ static void i386_tr_translate_insn(DisasContextBase
*dcbase, CPUState *cpu,
struct qemu_plugin_insn *plugin_insn)
{
DisasContext *dc = container_of(dcbase, DisasContext, base);
- target_ulong pc_next = disas_insn(dc, cpu);
+ target_ulong pc_next = disas_insn(dc, cpu, plugin_insn);
if (dc->tf || (dc->base.tb->flags & HF_INHIBIT_IRQ_MASK)) {
/* if single step mode, we generate only one instruction and
@@ -8584,6 +8603,8 @@ static const TranslatorOps i386_tr_ops = {
.translate_insn = i386_tr_translate_insn,
.tb_stop = i386_tr_tb_stop,
.disas_log = i386_tr_disas_log,
+ .ctx_base_offset = offsetof(DisasContext, base),
+ .ctx_size = sizeof(DisasContext),
};
/* generate intermediate code for basic block 'tb'. */
--
2.17.1
- [Qemu-devel] [RFC 44/48] cpus: lockstep execution support, (continued)
- [Qemu-devel] [RFC 44/48] cpus: lockstep execution support, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 36/48] target/xtensa: prepare for 2-pass translation, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 42/48] vl: support -plugin option, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 33/48] target/riscv: prepare for 2-pass translation, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 30/48] target/m68k: prepare for 2-pass translation, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 35/48] target/sparc: prepare for 2-pass translation, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 41/48] configure: add --enable-plugins, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 38/48] translator: implement 2-pass translation, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 27/48] target/sh4: prepare for 2-pass translation (WIP), Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 22/48] cpu: hook plugin vcpu events, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 28/48] target/i386: prepare for 2-pass translation,
Emilio G. Cota <=
- [Qemu-devel] [RFC 23/48] translator: add plugin_insn argument to translate_insn, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 39/48] plugin: add API symbols to qemu-plugins.symbols, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 18/48] tcg: add memory callbacks for plugins (WIP), Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 10/48] exec: export do_tb_flush, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 19/48] translate-all: notify plugin code of tb_flush, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 09/48] tcg: reset runtime helpers when flushing the code cache, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 01/48] cpu: introduce run_on_cpu_no_bql, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 20/48] *-user: notify plugin of exit, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 13/48] xxhash: add qemu_xxhash8, Emilio G. Cota, 2018/10/25
- [Qemu-devel] [RFC 48/48] plugin: add a couple of very simple examples, Emilio G. Cota, 2018/10/25