Re: [Qemu-devel] [PATCH v5 2/2] target/mips: Optimize ILVEV.<B|H|W|D> MSA instructions

[Aleksandar Markovic]

> > From: Mateja Marjanovic <address@hidden>
> > Subject: Re: [Qemu-devel] [PATCH v5 2/2] target/mips: Optimize 
> > ILVEV.<B|H|W|D> MSA > > instructions
> > 
> > 
> > On 3.4.19. 01:25, Aleksandar Markovic wrote:
> > 
> > On Apr 2, 2019 5:20 PM, "Mateja Marjanovic" <address@hidden<> > 
> > mailto:address@hidden>> wrote:
> > >
> > > From: Mateja Marjanovic <address@hidden<> > mailto:address@hidden>>
> > >
> > > Optimize set of MSA instructions ILVEV
> > >
> > > ...
> > 
> > The byte and halfword cases of this patch most likely produce highly 
> > unoptimized code > > for cases:
> > 
> > wd == wt == ws
> > wd == wt != ws
> > wd != ws == wt
> > wd == ws != wt
> > 
> > Please take these cases into account.
> > 
> > The same for patch 1/2.
> 
> Maybe, but if I put if statements asking are the registers the same,
> it would affect the performance significantly in all cases. If some
> registers were equal, it would be faster, but if not, just those if statements
> would slow things down.

Mateja,

It won't affect the performance significantly at all. Distinguish between
the code executed in translate time (rarely) and execute time (often).
If statement you mention are executed in translate time.

Thanks,
Aleksandar