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[PATCH 35/45] target/hppa: Split PSW X and B into their own field
From: |
Richard Henderson |
Subject: |
[PATCH 35/45] target/hppa: Split PSW X and B into their own field |
Date: |
Wed, 24 Apr 2024 17:00:13 -0700 |
Generally, both of these bits are cleared at the end of each
instruction. By separating these, we will be able to clear
both with a single insn, instead of 2 or 3.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/cpu.h | 3 ++-
target/hppa/helper.c | 6 +++---
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 66cae795bd..629299653d 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -214,7 +214,8 @@ typedef struct CPUArchState {
uint64_t fr[32];
uint64_t sr[8]; /* stored shifted into place for gva */
- target_ulong psw; /* All psw bits except the following: */
+ uint32_t psw; /* All psw bits except the following: */
+ uint32_t psw_xb; /* X and B, in their normal positions */
target_ulong psw_n; /* boolean */
target_long psw_v; /* in most significant bit */
diff --git a/target/hppa/helper.c b/target/hppa/helper.c
index 7d22c248fb..b79ddd8184 100644
--- a/target/hppa/helper.c
+++ b/target/hppa/helper.c
@@ -54,7 +54,7 @@ target_ulong cpu_hppa_get_psw(CPUHPPAState *env)
psw |= env->psw_n * PSW_N;
psw |= (env->psw_v < 0) * PSW_V;
- psw |= env->psw;
+ psw |= env->psw | env->psw_xb;
return psw;
}
@@ -76,8 +76,8 @@ void cpu_hppa_put_psw(CPUHPPAState *env, target_ulong psw)
}
psw &= ~reserved;
- env->psw = psw & (uint32_t)~(PSW_N | PSW_V | PSW_CB);
-
+ env->psw = psw & (uint32_t)~(PSW_B | PSW_N | PSW_V | PSW_X | PSW_CB);
+ env->psw_xb = psw & (PSW_X | PSW_B);
env->psw_n = (psw / PSW_N) & 1;
env->psw_v = -((psw / PSW_V) & 1);
--
2.34.1
- [PATCH 09/45] target/hppa: Delay computation of IAQ_Next, (continued)
- [PATCH 09/45] target/hppa: Delay computation of IAQ_Next, Richard Henderson, 2024/04/24
- [PATCH 25/45] target/hppa: Use registerfields.h for FPSR, Richard Henderson, 2024/04/24
- [PATCH 32/45] target/hppa: Store full iaoq_f and page bits of iaoq_d in TB, Richard Henderson, 2024/04/24
- [PATCH 31/45] linux-user/hppa: Force all code addresses to PRIV_USER, Richard Henderson, 2024/04/24
- [PATCH 26/45] target/hppa: Use TCG_COND_TST* in trans_ftest, Richard Henderson, 2024/04/24
- [PATCH 30/45] target/hppa: Use delay_excp for conditional trap on overflow, Richard Henderson, 2024/04/24
- [PATCH 34/45] target/hppa: Improve hppa_cpu_dump_state, Richard Henderson, 2024/04/24
- [PATCH 36/45] target/hppa: Manage PSW_X and PSW_B in translator, Richard Henderson, 2024/04/24
- [PATCH 21/45] target/hppa: Use TCG_COND_TST* in do_log_cond, Richard Henderson, 2024/04/24
- [PATCH 33/45] target/hppa: Do not mask in copy_iaoq_entry, Richard Henderson, 2024/04/24
- [PATCH 35/45] target/hppa: Split PSW X and B into their own field,
Richard Henderson <=
- [PATCH 37/45] target/hppa: Implement PSW_B, Richard Henderson, 2024/04/24
- [PATCH 38/45] target/hppa: Implement PSW_X, Richard Henderson, 2024/04/24
- [PATCH 39/45] target/hppa: Drop tlb_entry return from hppa_get_physical_address, Richard Henderson, 2024/04/24
- [PATCH 41/45] target/hppa: Implement CF_PCREL, Richard Henderson, 2024/04/24
- [PATCH 44/45] target/hppa: Log cpu state at interrupt, Richard Henderson, 2024/04/24
- [PATCH 43/45] target/hppa: Implement PSW_H, PSW_L, Richard Henderson, 2024/04/24
- [PATCH 42/45] target/hppa: Implement PSW_T, Richard Henderson, 2024/04/24
- [PATCH 45/45] target/hppa: Log cpu state on return-from-interrupt, Richard Henderson, 2024/04/24
- [PATCH 40/45] target/hppa: Adjust priv for B,GATE at runtime, Richard Henderson, 2024/04/24