Re: [Simulavr-devel] patch #6776: No segfault on access to notimplemented I/O registers

[Joel Sherrill]

Joerg Wunsch wrote:
> As Joel Sherrill wrote:
>
>   
> > OK.  I wasn't planning on halting simulation only
> > printing a message.
> >     
>
>   
> > Are you proposing another command line option to
> > silence these warnings?
> >     
>
> Yes, something like that.
>   
For now, I tied it to global_verbose (-V).  There is another
nit I didn't know if we wanted to address.  The RWReserved
class doesn't know its own address.  So I would have to add
a member variable and add a parameter to every constructor
if we wanted it to have the address in the diagnostics.
>   
> > FWIW random is relative in the simulator -- writes
> > are silently eaten and all reads return 0.  Real
> > hardware might actually be more random given the variety
> > of CPU models. :)
> >     
>
> Real hardware usually isn't really random either, it's just
> unpredictable.  In most cases, accessing unimplemented IO registers
> will read as 0, and writes are ignored, but there could as well be
> hidden IO registers that are used during manufacturing tests, or for
> hardware debugging.
>
>   
:)


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