Re: [avr-gcc-list] New prosessor goes into stack violation!

[E. Weddington]

E. Weddington wrote:

> Ben L. Titzer wrote:
>
> > > >
> > > No, this address is not, as I can understand, in the interrupt 
> > > vector table. There are relatively few interrupt vector in this 
> > > processor compared to the ordinary AVR processors. Since it 
> > > originally is used in smart card applications it also has very 
> > > limited I/O.
> > >
> > > Since this is in the startup code and no calls or anything has been 
> > > done, the SP has not changed from its initial value. The only thing 
> > > it has done some far is to set the SP and start copying from the end 
> > > of the program area in flash to SRAM.
> > >
> > > As you can see from the disassembly this is ordinary avr-gcc startup 
> > > code:
> >
> > The interrupt vector table is in flash anyway, and ST writes to SRAM, 
> > so this shouldn't have anything to do with interrupts. 
>
>
> Duh. Of course.
>
> > Sorry I have to ask again, but what is the actual value of SP when 
> > the store occurs?
> >
> > BTW, how much RAM does this particular chip have? The AT90 series had 
> > a maximum of 512b IIRC.
> Looks like 3K:
> <http://www.atmel.com/dyn/resources/prod_documents/1316S.PDF>
Ok, I'm doing real good here. *cough*
That data sheet says *1.5K*.

This is the data sheet for the *CS variant:
<http://www.atmel.com/dyn/resources/prod_documents/1572s.pdf>
And *that* says 3K.