[Bug gas/22988] New: aarch64 sve invalid addressing mode

[rth at gcc dot gnu.org]

https://sourceware.org/bugzilla/show_bug.cgi?id=22988

            Bug ID: 22988
           Summary: aarch64 sve invalid addressing mode
           Product: binutils
           Version: 2.29
            Status: NEW
          Severity: normal
          Priority: P2
         Component: gas
          Assignee: unassigned at sourceware dot org
          Reporter: rth at gcc dot gnu.org
  Target Milestone: ---

.arch   armv8-a+sve
        ldff1b  z0.b, p1/z, [x0]

z.s: Assembler messages:
z.s:2: Error: invalid addressing mode at operand 3 -- `ldff1b z0.b,p1/z,[x0]'

According to the ARM ARM, this is supposed to be encoded as [x0, xzr].

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