RE: SDR transceiver having independent mixer and ADC sampling clocks

[Heikki Laamanen]

Thanks Brian. You are right, there exists three VCOs and PLLs in the AD9361 which can be controlled independently.

 

AD9361 Reference Manual UG-570 shows a more detailed diagram in Figure 7. on page 20. The baseband PLL comprises an N/N+1 divider controlled by a high-precision sigma-delta modulator. AD9361 Register Map Reference Manual UG-671 describes that the control word of the sigma-delta modulator consists of 29 bits giving a relative frequency resolution of 1.9 ppb (parts per billion).

 

A brief description of the timing system.  The objective is a system for protecting or replacing GPS-based timing. In addition to navigation, the GPS system is used for generating an accurate clock which is in synchronism with the Coordinated Universal Time (UTC). A clock synchronized with the UTC, can be for example a 1 Hz physical clock signal whose rising edge goes up exactly at the start of an UTC second. The accuracy of an GPS-based timing system is about +-50 ns. Thus, we can say that the phase accuracy of GPS-based timing is about 50 ns.  The objective is to generate such clock by receiving a broadcast radio signal which is known to be in synchronism with the UTC.

 

You mentioned that time is completely relative. If we think of the UTC, we could say that it gives an absolute time which is defined by several atomic clocks around the globe. A copy of the UTC can be generated, with a certain accuracy, by receiving the GPS or other similar satellite signal (Galileo, Glonass, Beidou) and synchronizing to it.

 

Heikki

 

From: Brian Padalino <address@hidden>
Sent: 24. helmikuutata 2020 18:11
To: Heikki Laamanen <address@hidden>
Cc: GNURadio Discussion List <address@hidden>
Subject: Re: SDR transceiver having independent mixer and ADC sampling clocks

 

On Mon, Feb 24, 2020 at 10:39 AM Heikki Laamanen <address@hidden> wrote:

Hi experts in SDR RF transceivers,

 

I am working on a timing and synchronization system which generates a high-precision timing signal from a terrestrial broadcast signal.  I am looking for a suitable SDR HW-board providing independent clocks for the RF mixers and the ADC.

 

It seems that many SDR boards use transceiver chips having mixer and ADC clocks which are derived from a single clock. Thus, it is not feasible to control the ADC sampling clock frequency without affecting the mixer frequency. For example, some USRP products have Analog Devices AD9361 transceiver chips providing no option to have fully independent mixer and ADC clocks.

 

Is this assertion true?  According to this document:

 

  https://ez.analog.com/wide-band-rf-transceivers/design-support/w/documents/10064/ad936x-local-oscillator-lo

 

There exists 3 VCO's in the AD9361.  One for TX, one for RX, and one for the baseband.  Why do you believe the clocks are not independent?  I agree the sampling clock might not be able to achieve the resolution you want, but I don't see why they are not fully independent already.

 

 

Why would I like to have independent mixer and ADC sampling clock?

 

The target is to generate a physical clock signal having small jitter and accurate phase. Hence, I need to control the frequency of some VCO based on the information the receiver signal processing gives. The most straightforward way to do this is to control the frequency of a VCO wherefrom the ADC sampling clock is derived.

 

You need to be more specific regarding your jitter and phase requirements.

 

Also remember that time is all completely relative.  Lastly, what does accurate phase mean to you?

 

Brian