Ettus N210 clock test header

[Fabien PELLET]

Hello,

How can I enable the test clock output on J503 in my USRP N210 ? Is 
there a way to do that only using UHD methods that I can use in my C++ 
code ?

I would like to use it on a hardware I'm designing that need to be 
perfectly synchronised with the internal DAC, ADC and FPGA.

Thanks for the help,

Best regards,

Fabien, F4CTZ.