Re: announcing XHCI support (USB 3.0)

[Thomas Frauendorfer]

Hi Jan,

I noticed that the code will not handle XHCI controllers with multiple
USB 3 port ranges.
This is no problem with USB 3.0 controllers, but the USB 3.1 and USB
3.2 specs brought additional speeds.
At my workplace we have a Ryzen mainboard with an XHCI controller
where 2 ports support up to Gen2 speed and 2 ports support Gen 1 (USB
3.0) speed.
The code in xhci.c will not handle that correctly, as it only supports
one USB 3 configuration and it does not check if it already found any
USB 3 ports.

The BIOS handoff code also looks sketchy. XHCI handles BIOS handoff
through an extended attribute in the mmio space. The code tries to do
the handoff through the pci space.
That code looks like it has been copied over from EHCI where the BIOS
handoff fields are located in the PCI space.

I also don't see any adjustments to handle USB3 hubs, but I did not
look very hard.
USB3 hubs use different hub descriptors and a different port status
field so they need some special handling.
The USB2 part of the hubs on a XHCI controller should be fine.

If you have any questions feel free to ask.

Greetings,
Thomas