Re: circular includes cause infinite loop

[gk]

At 05:01 PM 10/23/2002 -0400, Paul D. Smith wrote:
>   g> Infinite loop results.
>
>   g> How should this be prevented?
>
> The same way as it's done in C:
>
>   $ cat MyMakefile.mk
>   ifndef __MY_MAKEFILE
>   __MY_MAKEFILE := 1
>
>     ...contents...
>
>   endif

Ok. But how to you make this method easily extensible?
Since I may have several makefiles with the same name 'Makefile', in 
different directories, I need the ifndef variable to include the full path, 
but I don't want to hard code the path in the makefile.
I tried prepending $(CURDIR) to the name of the makefile in the following 
example and still get an infinite loop.
I'm sure this is invalid syntax for ifndef but can't think of another way 
to do it.

--- Makefile:
ifndef $(CURDIR)/Makefile
$(CURDIR)/Makefile := 1

include $(CURDIR)/Makefile2

.PHONY: foo
foo:
        @echo $@: $(CURDIR)
endif

--- Makefile2:
ifndef $(CURDIR)/Makefile2
$(CURDIR)/Makefile2 := 1

include $(CURDIR)/Makefile

.PHONY: boo
boo:
        @echo $@:
endif

Thanks,
Greg Keraunen