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Re: Remaking when some "parameter" changes value
From: |
Greg Chicares |
Subject: |
Re: Remaking when some "parameter" changes value |
Date: |
Mon, 13 Feb 2006 05:25:21 +0000 |
User-agent: |
Mozilla Thunderbird 1.0.2 (Windows/20050317) |
On 2006-2-12 23:54 UTC, Nick Patavalis wrote:
> My problem, in a nutshell, is this: How can I force a project be
> remade, when one of the parameters passed to Make changes? When, for
> example, the flags to the compiler, or to the linker, change?
I don't think there's a much better method than the one you show.
> But if, after having built everything, or after I have
> built a part of the project, if I say:
>
> $ make ARCH=ppc-linux-
>
> Then, instead of rebuilding everything---which would be the only safe
> and reasonable thing to do---I either get "Nothing to be done...", or
> a partial build that mixes "arm" and "ppc" objects and binaries.
In the particular case of $(ARCH), I'd rather use different build
directories.
> The
> same goes if I say, for instance:
>
> $ make CFLAGS=-Wall -Winline -O2
>
> I think you can understand the trouble this can lead to.
A really bad case would be CFLAGS=-DNDEBUG. Then again, changing
make CFLAGS='-Wall'
to
make CFLAGS='-W -Wall -Werror -pedantic-errors'
might legitimately mean "don't compile that one source file I just
changed unless it elicits no warnings", even though other source
files aren't all warning-free. "Do What I Mean" isn't just hard,
it's ambiguous.
> Here's the best solution I could find to this problem. I rewrite the
> Makefile above, adding the following lines at the end:
>
> $(OBJS1) $(OBJS2) : signature
> $(shell ./mksignature.sh \
> "$(ARCH)" \
> "$(CC)" \
> "$(CFLAGS)" \
> "$(LD)" \
> "$(LDFLAGS)" \
> "$(LDLIBS) \
> ... etc ... )
[...]
> This solves the problem in a reliable, though not terribly efficient,
> way: It forces make to rebuild everything when some of the "hidden"
> dependencies change (hidden in the sense that they are not captured in
> files, hence Make does not normally know about them).
That implementation captures changes to explicitly-listed variables.
You could use $(MAKEOVERRIDES) to capture changes to command-line
variable definitions.
Some variations with ordering or whitespace differences
CFLAGS='-Wall -Winline'
CFLAGS=' -Wall -Winline'
CFLAGS='-Winline -Wall'
may be equivalent, while others may not be
CFLAGS='-O3 -O0'
CFLAGS='-O0 -O3'
but cost quickly exceeds benefit for exquisite refinements.
Similarly, your makefile might say
CFLAGS='-g'
and overriding it with a value identical to that default
make CFLAGS='-g'
ideally would be recognized as no different.
> What would,
> though, be ideal is a way to force make rebuild what is absolutely
> necessary. Like for example, if I change LDFLAGS, to relink the
> executables, without recompiling the objects. The technique shown
> above can be easily extended to accommodate this (by using multiple
> "signature" files) but, to my taste, the resulting makefile gets way
> too complicated, and it doesn't worth the trouble for most real-world
> cases.
Agreed. Probably it's best to be mindful of when you need to
make clean first.