multiple assignments on one line?

[Alexis Huxley]

I'm using a $(shell ...)-ed command to generate some variable
assignments. I want to have these assigments evaluated by a Makefile.

Unfortunately $(shell ...) is stripping out the newlines and
making the multiple assigments - one per line - into one single
assignment with a very long right-hand side. 

Uncomment one of the four numbered cases below, which just
invoke 'sh' to do some echoing as a simple simulation of an external
script generating lots of assigments, to see what I mean:

        #  Case #1 - a single assigment - this works
        #FRUITS = apple banana
        
        #  Case #2 - a single assigment done by evaluating the output
        #  produced by an external script - this works
        #$(eval $(shell sh -c 'echo "FRUITS = apple banana"'))
        
        #  Case #3 - a double assigment done by evaluating the output
        #  produced by an external script - this does NOT work
        #$(eval $(shell sh -c 'echo "FRUITS = apple banana"; echo "VEGETABLES = 
asparagus beetroot"'))
        
        #  Case #4 - here's the same assigments done manually.
        #FRUITS = apple banana
        #VEGETABLES = asparagus beetroot
        
        default:
                @echo "FRUITS = $(FRUITS)"
                @echo "VEGETABLES = $(VEGETABLES)"

Case #3 is the interesting one; it outputs:

        FRUITS = apple banana VEGETABLES = asparagus beetroot
        VEGETABLES = 

I tried making the external command echo a single line with 
the assigments separated by semicolons like this:

        FRUITS = apple banana; VEGETABLES = asparagus beetroot

but this did not work. I also googled and checked the make docs 
but didn't find anything.

I found a really ugly workaround; namely that if the external script
does not write the assignments to stdout, but instead writes them
to a temp file and just echos the name of the temp file on stdout, 
then I can include that file with:

        include $(shell name-of-my-script)

but of course this is resulting in temporary files all over the
place that I don't really feel are the Makefile's responsibility
to clean up :-(

So, now the question: Is there a way to either:

        1) prevent $(shell ...) from making the newline to 
           space substitution, or

        2) pack multiple assigments onto one line without 
           later assigments being interpreted as part of the
           right-hand side of the first assigment

? Thanks for any assistance/suggestions you can offer!

Alexis