Re: multiple assignments on one line?

[Alexis Huxley]

>>         2) pack multiple assigments onto one line without
>
> here(http://lists.gnu.org/archive/html/help-make/2006-11/msg00001.html)
> and apparently the GNU Make's parser always behaves in such a way that
> you will need to have variables on separate lines.

Thanks for the pointer. 

But then is there some sort of '\n' that make interprets as newlines?
I mean suppose my external script echo-ed literally this:

        FRUITS = apple banana \n VEGETABLES = asparagus beetroot

and during make's evaluation of that string it interpreted the \n
as a newline then that would give me what I want. (Of course I have
tried this and it didn't work and I didn't find anything about this
sort of interpreted escaping in the docs.)

I know that there is the verbatim defining
(http://www.gnu.org/software/make/manual/make.html#Defining), but
that *itself* requires multiple lines which doesn't help me.

I have used verbatim defining to define a newline:

        #  Note the *two* blank lines between 'define' and 'endef'
        define newline
        
        
        endef
        
        $(eval $(shell my-external-script))
        
        default:
                @echo FRUITS = $(FRUITS)
                @echo VEGETABLES = $(VEGETABLES)

where 'my-external-script' outputs literally:

        FRUITS = apples bananas $(newline) VEGETABLES = asparagus beetroot

and this works, but:
        
        1) the Makefile must make the *definition* of 'newline'
        2) the external script must *know* that the name of the
           symbol which the Makefile will convert to newlines is
           'newline' 

and this is a really ugly division of responsibility! :-(

If only there was some built-in interpreted escaping method (e.g.
backslashing) then the external script could use that! But ...

... is there one? Did I miss something?

Alexis