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Re: Merging rules
From: |
Basin Ilya |
Subject: |
Re: Merging rules |
Date: |
Wed, 13 Jun 2018 21:15:25 +0300 |
User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 |
Hi Sébastien.
> Then make will think that with only one invocation all the different
> types of files will be produced, which is of course wrong.
I think you've got a wrong impression. Make will run the rule as many times as
needed to make all the targets.
13.06.2018 20:38, Sébastien Hinderer пишет:
> Dear all,
>
> Assume the following fragment of a Makefile
>
> %.$(O): %.c
> $(CC) ...
>
> %.pic.$(O): %.c
> $(CC) ...
>
> %.p.$(O): %.c
> $(CC) ...
>
> %.i.$(O): %.c
> $(CC) ...
>
> %.d.$(O): %.c
> $(CC) ...
>
> That is, these rules build different types of object files from C
> sources.
>
> Until recently the commands in these rules were different but now,
> thanks to target-specific variables, I managed to make all the commands
> in these rule look exactly the same.
>
> I am now wondering: is there a way to "merge" all these rules in just
> one generic rule?
>
> I assume if I write something like
>
> %.$(O) %.pic.$(O) %.p.$(O) %.i.$(O) %.d.$(O): %.c
> $(CC) ...
>
> Then make will think that with only one invocation all the different
> types of files will be produced, which is of course wrong.
>
> Is there another way to achieve this?
>
> Many thanks in advance!
>
> Sébastien.
>
>
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>
- Merging rules, Sébastien Hinderer, 2018/06/13
- Re: Merging rules,
Basin Ilya <=
- Re: Merging rules, Sébastien Hinderer, 2018/06/13
- Re: Merging rules, Basin Ilya, 2018/06/14
- Re: Merging rules, Sébastien Hinderer, 2018/06/14
- Re: Merging rules, Paul Smith, 2018/06/14
- Re: Merging rules, Sébastien Hinderer, 2018/06/14
- Re: Merging rules, Sébastien Hinderer, 2018/06/14