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Re: [Qemu-arm] [PATCH v2 6/7] linux-user: Support SVE in aarch64 signal
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH v2 6/7] linux-user: Support SVE in aarch64 signal frames |
Date: |
Thu, 15 Feb 2018 13:20:37 +0000 |
On 11 February 2018 at 20:58, Richard Henderson
<address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> linux-user/signal.c | 348
> ++++++++++++++++++++++++++++++++++++++++++----------
> 1 file changed, 283 insertions(+), 65 deletions(-)
>
> diff --git a/linux-user/signal.c b/linux-user/signal.c
> index 9a380b9e31..af953175db 100644
> --- a/linux-user/signal.c
> +++ b/linux-user/signal.c
> @@ -1443,35 +1443,61 @@ struct target_fpsimd_context {
> uint64_t vregs[32 * 2]; /* really uint128_t vregs[32] */
> };
>
> -/*
> - * Auxiliary context saved in the sigcontext.__reserved array. Not exported
> to
> - * user space as it will change with the addition of new context. User space
> - * should check the magic/size information.
> - */
> -struct target_aux_context {
> - struct target_fpsimd_context fpsimd;
> - /* additional context to be added before "end" */
> - struct target_aarch64_ctx end;
> +#define TARGET_EXTRA_MAGIC 0x45585401
> +
> +struct target_extra_context {
> + struct target_aarch64_ctx head;
> + uint64_t datap; /* 16-byte aligned pointer to extra space cast to __u64
> */
> + uint32_t size; /* size in bytes of the extra space */
> + uint32_t reserved[3];
> +};
> +
> +#define TARGET_SVE_MAGIC 0x53564501
> +
> +struct target_sve_context {
> + struct target_aarch64_ctx head;
> + uint16_t vl;
> + uint16_t reserved[3];
> };
I found this patch too hard to review. It looks like you've combined
a refactoring of how we handle the AArch64 "bunch of extra auxiliary
context records" sigframe information with the addition of the SVE
context record. Could you split that into separate patches, please?
A description of why the current code isn't sufficient would also
be helpful.
thanks
-- PMM
- [Qemu-arm] [PATCH v2 0/7] target/arm: More SVE prep work, Richard Henderson, 2018/02/11
- [Qemu-arm] [PATCH v2 1/7] target/arm: Remove ARM_CP_64BIT from ZCR_EL registers, Richard Henderson, 2018/02/11
- [Qemu-arm] [PATCH v2 2/7] target/arm: Enforce FP access to FPCR/FPSR, Richard Henderson, 2018/02/11
- [Qemu-arm] [PATCH v2 3/7] target/arm: Suppress TB end for FPCR/FPSR, Richard Henderson, 2018/02/11
- [Qemu-arm] [PATCH v2 4/7] target/arm: Enforce access to ZCR_EL at translation, Richard Henderson, 2018/02/11
- [Qemu-arm] [PATCH v2 5/7] target/arm: Handle SVE registers when using clear_vec_high, Richard Henderson, 2018/02/11
- [Qemu-arm] [PATCH v2 7/7] linux-user: Implement aarch64 PR_SVE_SET/GET_VL, Richard Henderson, 2018/02/11
- [Qemu-arm] [PATCH v2 6/7] linux-user: Support SVE in aarch64 signal frames, Richard Henderson, 2018/02/11
- Re: [Qemu-arm] [PATCH v2 6/7] linux-user: Support SVE in aarch64 signal frames,
Peter Maydell <=
- Re: [Qemu-arm] [PATCH v2 0/7] target/arm: More SVE prep work, Peter Maydell, 2018/02/15