Re: [Qemu-arm] [PATCH v2 59/67] target/arm: Implement SVE Floating Point Multiply Indexed Group

[Peter Maydell]

On 17 February 2018 at 18:23, Richard Henderson
<address@hidden> wrote:
> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target/arm/helper.h        | 14 ++++++++++
>  target/arm/translate-sve.c | 44 +++++++++++++++++++++++++++++++
>  target/arm/vec_helper.c    | 64 
> ++++++++++++++++++++++++++++++++++++++++++++++
>  target/arm/sve.decode      | 19 ++++++++++++++
>  4 files changed, 141 insertions(+)

> diff --git a/target/arm/vec_helper.c b/target/arm/vec_helper.c
> index ad5c29cdd5..e711a3217d 100644
> --- a/target/arm/vec_helper.c
> +++ b/target/arm/vec_helper.c
> @@ -24,6 +24,22 @@
>  #include "fpu/softfloat.h"
>
>
> +/* Note that vector data is stored in host-endian 64-bit chunks,
> +   so addressing units smaller than that needs a host-endian fixup.  */
> +#ifdef HOST_WORDS_BIGENDIAN
> +#define H1(x)   ((x) ^ 7)
> +#define H1_2(x) ((x) ^ 6)
> +#define H1_4(x) ((x) ^ 4)
> +#define H2(x)   ((x) ^ 3)
> +#define H4(x)   ((x) ^ 1)
> +#else
> +#define H1(x)   (x)
> +#define H1_2(x) (x)
> +#define H1_4(x) (x)
> +#define H2(x)   (x)
> +#define H4(x)   (x)
> +#endif
> +

I wasn't expecting to see these macros here. Don't we have them already?

Anyway
Reviewed-by: Peter Maydell <address@hidden>

thanks
-- PMM