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[Qemu-arm] [PATCH v3 03/22] target/arm: Check PMCNTEN for whether PMCCNT
From: |
Aaron Lindsay |
Subject: |
[Qemu-arm] [PATCH v3 03/22] target/arm: Check PMCNTEN for whether PMCCNTR is enabled |
Date: |
Fri, 16 Mar 2018 16:31:01 -0400 |
Signed-off-by: Aaron Lindsay <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 09893e3..5e48982 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -994,7 +994,7 @@ static inline bool arm_ccnt_enabled(CPUARMState *env)
{
/* This does not support checking PMCCFILTR_EL0 register */
- if (!(env->cp15.c9_pmcr & PMCRE)) {
+ if (!(env->cp15.c9_pmcr & PMCRE) || !(env->cp15.c9_pmcnten & (1 << 31))) {
return false;
}
--
Qualcomm Datacenter Technologies as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
[Qemu-arm] [PATCH v3 02/22] target/arm: A15 PMCEID0 initialization style nit, Aaron Lindsay, 2018/03/16
[Qemu-arm] [PATCH v3 03/22] target/arm: Check PMCNTEN for whether PMCCNTR is enabled,
Aaron Lindsay <=
[Qemu-arm] [PATCH v3 04/22] target/arm: Treat PMCCNTR as alias of PMCCNTR_EL0, Aaron Lindsay, 2018/03/16
[Qemu-arm] [PATCH v3 05/22] target/arm: Reorganize PMCCNTR read, write, sync, Aaron Lindsay, 2018/03/16
[Qemu-arm] [PATCH v3 07/22] target/arm: Fetch GICv3 state directly from CPUARMState, Aaron Lindsay, 2018/03/16
[Qemu-arm] [PATCH v3 06/22] target/arm: Mask PMU register writes based on PMCR_EL0.N, Aaron Lindsay, 2018/03/16
[Qemu-arm] [PATCH v3 08/22] target/arm: Support multiple EL change hooks, Aaron Lindsay, 2018/03/16
[Qemu-arm] [PATCH v3 10/22] target/arm: Allow EL change hooks to do IO, Aaron Lindsay, 2018/03/16
[Qemu-arm] [PATCH v3 09/22] target/arm: Add pre-EL change hooks, Aaron Lindsay, 2018/03/16