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Re: [Qemu-arm] [PATCH v2 15/23] target/arm: Make ARM TLB filling routine
From: |
Alex Bennée |
Subject: |
Re: [Qemu-arm] [PATCH v2 15/23] target/arm: Make ARM TLB filling routine static |
Date: |
Mon, 17 Jun 2019 15:16:08 +0100 |
User-agent: |
mu4e 1.3.2; emacs 26.1 |
Philippe Mathieu-Daudé <address@hidden> writes:
> From: Samuel Ortiz <address@hidden>
>
> It's only used in op_helper.c, it does not need to be exported and
> moreover it should only be build when TCG is enabled.
>
> Signed-off-by: Samuel Ortiz <address@hidden>
> [PMD: Rebased]
> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> target/arm/helper.c | 53 ---------------------------------------
> target/arm/internals.h | 2 ++
> target/arm/op_helper.c | 56 ++++++++++++++++++++++++++++++++++++++++++
> 3 files changed, 58 insertions(+), 53 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 673ada1e86..a4af02c984 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -10621,59 +10621,6 @@ hwaddr arm_cpu_get_phys_page_attrs_debug(CPUState
> *cs, vaddr addr,
>
> #endif
>
> -bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> - MMUAccessType access_type, int mmu_idx,
> - bool probe, uintptr_t retaddr)
> -{
> - ARMCPU *cpu = ARM_CPU(cs);
> -
> -#ifdef CONFIG_USER_ONLY
> - cpu->env.exception.vaddress = address;
> - if (access_type == MMU_INST_FETCH) {
> - cs->exception_index = EXCP_PREFETCH_ABORT;
> - } else {
> - cs->exception_index = EXCP_DATA_ABORT;
> - }
> - cpu_loop_exit_restore(cs, retaddr);
> -#else
> - hwaddr phys_addr;
> - target_ulong page_size;
> - int prot, ret;
> - MemTxAttrs attrs = {};
> - ARMMMUFaultInfo fi = {};
> -
> - /*
> - * Walk the page table and (if the mapping exists) add the page
> - * to the TLB. On success, return true. Otherwise, if probing,
> - * return false. Otherwise populate fsr with ARM DFSR/IFSR fault
> - * register format, and signal the fault.
> - */
> - ret = get_phys_addr(&cpu->env, address, access_type,
> - core_to_arm_mmu_idx(&cpu->env, mmu_idx),
> - &phys_addr, &attrs, &prot, &page_size, &fi,
> NULL);
Shouldn't we be moving the rest of the tlb filling code that gets
referred to here? Maybe we could keep it all together in tlb-helper.c?
> - if (likely(!ret)) {
> - /*
> - * Map a single [sub]page. Regions smaller than our declared
> - * target page size are handled specially, so for those we
> - * pass in the exact addresses.
> - */
> - if (page_size >= TARGET_PAGE_SIZE) {
> - phys_addr &= TARGET_PAGE_MASK;
> - address &= TARGET_PAGE_MASK;
> - }
> - tlb_set_page_with_attrs(cs, address, phys_addr, attrs,
> - prot, mmu_idx, page_size);
> - return true;
> - } else if (probe) {
> - return false;
> - } else {
> - /* now we have a real cpu fault */
> - cpu_restore_state(cs, retaddr, true);
> - arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
> - }
> -#endif
> -}
> -
> /* Note that signed overflow is undefined in C. The following routines are
> careful to use unsigned types where modulo arithmetic is required.
> Failure to do so _will_ break on newer gcc. */
> diff --git a/target/arm/internals.h b/target/arm/internals.h
> index fe9e4665e2..37ca493635 100644
> --- a/target/arm/internals.h
> +++ b/target/arm/internals.h
> @@ -761,9 +761,11 @@ static inline bool arm_extabort_type(MemTxResult result)
> return result != MEMTX_DECODE_ERROR;
> }
>
> +#ifdef CONFIG_TCG
> bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> MMUAccessType access_type, int mmu_idx,
> bool probe, uintptr_t retaddr);
> +#endif
>
> void arm_deliver_fault(ARMCPU *cpu, vaddr addr, MMUAccessType access_type,
> int mmu_idx, ARMMMUFaultInfo *fi) QEMU_NORETURN;
> diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
> index 29b56039e5..e43c99ebf0 100644
> --- a/target/arm/op_helper.c
> +++ b/target/arm/op_helper.c
> @@ -179,6 +179,62 @@ void arm_deliver_fault(ARMCPU *cpu, vaddr addr,
> MMUAccessType access_type,
> env->exception.fsr = fsr;
> raise_exception(env, exc, syn, target_el);
> }
> +#endif
> +
> +bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> + MMUAccessType access_type, int mmu_idx,
> + bool probe, uintptr_t retaddr)
> +{
> + ARMCPU *cpu = ARM_CPU(cs);
> +
> +#ifdef CONFIG_USER_ONLY
> + cpu->env.exception.vaddress = address;
> + if (access_type == MMU_INST_FETCH) {
> + cs->exception_index = EXCP_PREFETCH_ABORT;
> + } else {
> + cs->exception_index = EXCP_DATA_ABORT;
> + }
> + cpu_loop_exit_restore(cs, retaddr);
> +#else
> + hwaddr phys_addr;
> + target_ulong page_size;
> + int prot, ret;
> + MemTxAttrs attrs = {};
> + ARMMMUFaultInfo fi = {};
> +
> + /*
> + * Walk the page table and (if the mapping exists) add the page
> + * to the TLB. On success, return true. Otherwise, if probing,
> + * return false. Otherwise populate fsr with ARM DFSR/IFSR fault
> + * register format, and signal the fault.
> + */
> + ret = get_phys_addr(&cpu->env, address, access_type,
> + core_to_arm_mmu_idx(&cpu->env, mmu_idx),
> + &phys_addr, &attrs, &prot, &page_size, &fi, NULL);
> + if (likely(!ret)) {
> + /*
> + * Map a single [sub]page. Regions smaller than our declared
> + * target page size are handled specially, so for those we
> + * pass in the exact addresses.
> + */
> + if (page_size >= TARGET_PAGE_SIZE) {
> + phys_addr &= TARGET_PAGE_MASK;
> + address &= TARGET_PAGE_MASK;
> + }
> + tlb_set_page_with_attrs(cs, address, phys_addr, attrs,
> + prot, mmu_idx, page_size);
> + return true;
> + } else if (probe) {
> + return false;
> + } else {
> + /* now we have a real cpu fault */
> + cpu_restore_state(cs, retaddr, true);
> + arm_deliver_fault(cpu, address, access_type, mmu_idx, &fi);
> + }
> +#endif
> +}
> +
> +#if !defined(CONFIG_USER_ONLY)
>
> /* Raise a data fault alignment exception for the specified virtual address
> */
> void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
--
Alex Bennée
- [Qemu-arm] [PATCH v2 11/23] target/arm: Declare v7m_cpacr_pass() publicly, (continued)
- [Qemu-arm] [PATCH v2 11/23] target/arm: Declare v7m_cpacr_pass() publicly, Philippe Mathieu-Daudé, 2019/06/15
- [Qemu-arm] [PATCH v2 14/23] target/arm: Move the DC ZVA helper into op_helper, Philippe Mathieu-Daudé, 2019/06/15
- [Qemu-arm] [PATCH v2 08/23] target/arm: Move all v7m insn helpers into their own file, Philippe Mathieu-Daudé, 2019/06/15
- [Qemu-arm] [PATCH v2 13/23] target/arm: Make the v7-M Security State routines, Philippe Mathieu-Daudé, 2019/06/15
- [Qemu-arm] [PATCH v2 15/23] target/arm: Make ARM TLB filling routine static, Philippe Mathieu-Daudé, 2019/06/15
- Re: [Qemu-arm] [PATCH v2 15/23] target/arm: Make ARM TLB filling routine static,
Alex Bennée <=
- [Qemu-arm] [PATCH v2 16/23] target/arm: Make arm_deliver_fault() static, Philippe Mathieu-Daudé, 2019/06/15
- [Qemu-arm] [PATCH v2 17/23] target/arm: Fix coding style issues, Philippe Mathieu-Daudé, 2019/06/15
- [Qemu-arm] [PATCH v2 18/23] target/arm: Move CPU state dumping routines to helper.c, Philippe Mathieu-Daudé, 2019/06/15
- [Qemu-arm] [PATCH v2 19/23] target/arm: Move watchpoints APIs to helper.c, Philippe Mathieu-Daudé, 2019/06/15