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Re: [PATCH v3 00/18] target/arm: sve load/store improvements
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Re: [PATCH v3 00/18] target/arm: sve load/store improvements |
Date: |
Tue, 21 Apr 2020 22:37:57 -0700 (PDT) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v3 00/18] target/arm: sve load/store improvements
Message-id: address@hidden
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Switched to a new branch 'test'
4cc449f target/arm: Remove sve_memopidx
cecb8e8 target/arm: Reuse sve_probe_page for gather loads
9c2bbf3 target/arm: Reuse sve_probe_page for scatter stores
1f230e5 target/arm: Reuse sve_probe_page for gather first-fault loads
072e665 target/arm: Use SVEContLdSt for contiguous stores
64dc8bd target/arm: Update contiguous first-fault and no-fault loads
fa5a242 target/arm: Use SVEContLdSt for multi-register contiguous loads
b0e22ec target/arm: Handle watchpoints in sve_ld1_r
336353e target/arm: Use SVEContLdSt in sve_ld1_r
5d103ea target/arm: Adjust interface of sve_ld1_host_fn
cf5a541 target/arm: Add sve infrastructure for page lookup
67e550d target/arm: Drop manual handling of set/clear_helper_retaddr
c1428bf target/arm: Use cpu_*_data_ra for sve_ldst_tlb_fn
e625d1a accel/tcg: Add endian-specific cpu_{ld, st}* operations
c4a1a7c accel/tcg: Add probe_access_flags
7f333bf accel/tcg: Add block comment for probe_access
c43405b exec: Fix cpu_watchpoint_address_matches address length
543daa3 exec: Add block comments for watchpoint routines
=== OUTPUT BEGIN ===
1/18 Checking commit 543daa3e504d (exec: Add block comments for watchpoint
routines)
2/18 Checking commit c43405b82eea (exec: Fix cpu_watchpoint_address_matches
address length)
3/18 Checking commit 7f333bf1a998 (accel/tcg: Add block comment for
probe_access)
4/18 Checking commit c4a1a7c041e7 (accel/tcg: Add probe_access_flags)
5/18 Checking commit e625d1af4070 (accel/tcg: Add endian-specific cpu_{ld, st}*
operations)
6/18 Checking commit c1428bfc6ba8 (target/arm: Use cpu_*_data_ra for
sve_ldst_tlb_fn)
ERROR: spaces required around that '*' (ctx:VxV)
#62: FILE: target/arm/sve_helper.c:4029:
+ TLB(env, addr, (TYPEM)*(TYPEE *)(vd + H(reg_off)), ra); \
^
ERROR: spaces required around that '*' (ctx:WxV)
#152: FILE: target/arm/sve_helper.c:4162:
+ sve_ldst1_tlb_fn *tlb_fn)
^
total: 2 errors, 0 warnings, 455 lines checked
Patch 6/18 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/18 Checking commit 67e550dfef24 (target/arm: Drop manual handling of
set/clear_helper_retaddr)
8/18 Checking commit cf5a541132ca (target/arm: Add sve infrastructure for page
lookup)
WARNING: Block comments use a leading /* on a separate line
#31: FILE: target/arm/sve_helper.c:1633:
+/* Big-endian hosts need to frob the byte indices. If the copy
total: 0 errors, 1 warnings, 281 lines checked
Patch 8/18 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/18 Checking commit 5d103ea6bb5f (target/arm: Adjust interface of
sve_ld1_host_fn)
10/18 Checking commit 336353e1eeae (target/arm: Use SVEContLdSt in sve_ld1_r)
11/18 Checking commit b0e22ec2e54e (target/arm: Handle watchpoints in sve_ld1_r)
12/18 Checking commit fa5a242e25d2 (target/arm: Use SVEContLdSt for
multi-register contiguous loads)
13/18 Checking commit 64dc8bd8c13d (target/arm: Update contiguous first-fault
and no-fault loads)
14/18 Checking commit 072e665663b5 (target/arm: Use SVEContLdSt for contiguous
stores)
15/18 Checking commit 1f230e521a1d (target/arm: Reuse sve_probe_page for gather
first-fault loads)
16/18 Checking commit 9c2bbf312f6c (target/arm: Reuse sve_probe_page for
scatter stores)
17/18 Checking commit cecb8e871485 (target/arm: Reuse sve_probe_page for gather
loads)
18/18 Checking commit 4cc449fa07c0 (target/arm: Remove sve_memopidx)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to address@hidden
- Re: [PATCH v3 13/18] target/arm: Update contiguous first-fault and no-fault loads, (continued)
- Re: [PATCH v3 13/18] target/arm: Update contiguous first-fault and no-fault loads, Richard Henderson, 2020/04/27
- Re: [PATCH v3 13/18] target/arm: Update contiguous first-fault and no-fault loads, Peter Maydell, 2020/04/27
- Re: [PATCH v3 13/18] target/arm: Update contiguous first-fault and no-fault loads, Richard Henderson, 2020/04/27
- Re: [PATCH v3 13/18] target/arm: Update contiguous first-fault and no-fault loads, Peter Maydell, 2020/04/27
- Re: [PATCH v3 13/18] target/arm: Update contiguous first-fault and no-fault loads, Richard Henderson, 2020/04/28
[PATCH v3 15/18] target/arm: Reuse sve_probe_page for gather first-fault loads, Richard Henderson, 2020/04/22
[PATCH v3 16/18] target/arm: Reuse sve_probe_page for scatter stores, Richard Henderson, 2020/04/22
[PATCH v3 18/18] target/arm: Remove sve_memopidx, Richard Henderson, 2020/04/22
[PATCH v3 11/18] target/arm: Handle watchpoints in sve_ld1_r, Richard Henderson, 2020/04/22
[PATCH v3 17/18] target/arm: Reuse sve_probe_page for gather loads, Richard Henderson, 2020/04/22
Re: [PATCH v3 00/18] target/arm: sve load/store improvements,
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