[PATCHv2 00/17] ARM Secure EL2 extension

[Rémi Denis-Courmont]

The following changes since commit 193f51ddcf1d87d725f1dfd51b8a95351c910e8f:

  Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-fixes-20201109' 
into staging (2020-11-09 10:10:49 +0000)

are available for review.

Changes since version 1:
- Add the first patch which was accidentally dropped.
- Try to address comments from Peter and Richard.

----------------------------------------------------------------
Rémi Denis-Courmont (17):
      target/arm: remove redundant tests
      target/arm: add arm_is_el2_enabled() helper
      target/arm: use arm_is_el2_enabled() where applicable
      target/arm: use arm_hcr_el2_eff() where applicable
      target/arm: factor MDCR_EL2 common handling
      target/arm: declare new AA64PFR0 bit-fields
      target/arm: add 64-bit S-EL2 to EL exception table
      target/arm: return the stage 2 index for stage 1
      target/arm: add MMU stage 1 for Secure EL2
      target/arm: add ARMv8.4-SEL2 system registers
      target/arm: do S1_ptw_translate() before address space lookup
      target/arm: secure stage 2 translation regime
      target/arm: handle VMID change in secure state
      target/arm: set HPFAR_EL2.NS on secure stage 2 faults
      target/arm: add ARMv8.4-SEL2 extension
      target/arm: enable Secure EL2 in max CPU
      target/arm: refactor vae1_tlbmask()

 target/arm/cpu-param.h     |   2 +-
 target/arm/cpu.c           |  10 +-
 target/arm/cpu.h           |  92 ++++++++--
 target/arm/cpu64.c         |   1 +
 target/arm/helper-a64.c    |   8 +-
 target/arm/helper.c        | 421 ++++++++++++++++++++++++++++++---------------
 target/arm/internals.h     |  54 +++++-
 target/arm/op_helper.c     |   4 +-
 target/arm/tlb_helper.c    |   3 +
 target/arm/translate-a64.c |   4 +
 target/arm/translate.c     |   6 +-
 target/arm/translate.h     |   1 +
 12 files changed, 426 insertions(+), 180 deletions(-)
-- 
Rémi Denis-Courmont
http://www.remlab.net/