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Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CON
From: |
Peter Maydell |
Subject: |
Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value |
Date: |
Thu, 28 Jan 2021 13:54:05 +0000 |
On Thu, 28 Jan 2021 at 13:47, Bin Meng <bmeng.cn@gmail.com> wrote:
>
> On Thu, Jan 28, 2021 at 9:43 PM Peter Maydell <peter.maydell@linaro.org>
> wrote:
> >
> > On Tue, 19 Jan 2021 at 13:40, Bin Meng <bmeng.cn@gmail.com> wrote:
> > >
> > > From: Philippe Mathieu-Daudé <f4bug@amsat.org>
> > >
> > > When the block is disabled, all registers are reset with the
> > > exception of the ECSPI_CONREG. It is initialized to zero
> > > when the instance is created.
> > >
> > > Ref: i.MX 6DQ Applications Processor Reference Manual (IMX6DQRM),
> > > chapter 21.7.3: Control Register (ECSPIx_CONREG)
> >
> > > diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
> > > index 8fb3c9b..c952a3d 100644
> > > --- a/hw/ssi/imx_spi.c
> > > +++ b/hw/ssi/imx_spi.c
> > > @@ -231,12 +231,23 @@ static void imx_spi_flush_txfifo(IMXSPIState *s)
> > > static void imx_spi_reset(DeviceState *dev)
> > > {
> > > IMXSPIState *s = IMX_SPI(dev);
> > > + int i;
> > >
> > > DPRINTF("\n");
> > >
> > > - memset(s->regs, 0, sizeof(s->regs));
> > > -
> > > - s->regs[ECSPI_STATREG] = 0x00000003;
> > > + for (i = 0; i < ARRAY_SIZE(s->regs); i++) {
> > > + switch (i) {
> > > + case ECSPI_CONREG:
> > > + /* CONREG is not updated on reset */
> > > + break;
> > > + case ECSPI_STATREG:
> > > + s->regs[i] = 0x00000003;
> > > + break;
> > > + default:
> > > + s->regs[i] = 0;
> > > + break;
> > > + }
> > > + }
> >
> > This retains the CONREG register value for both:
> > * 'soft' reset caused by write to device register to disable
> > the block
> > -- this is corrcet as per the datasheet quote
> > * 'power on' reset via TYPE_DEVICE's reset method
> > -- but in this case we should reset CONREG, because the Device
> > reset method is like a complete device powercycle and should
> > return the device state to what it was when QEMU was first
> > started.
>
> The POR value of CONREG is zero, which should be the default value, no?
But you're not setting it to zero here, you're leaving it with
whatever value it had before. (That's correct for soft reset,
but wrong for power-on.)
thanks
-- PMM
- [PATCH v8 00/10] hw/ssi: imx_spi: Fix various bugs in the imx_spi model, Bin Meng, 2021/01/19
- [PATCH v8 01/10] hw/ssi: imx_spi: Use a macro for number of chip selects supported, Bin Meng, 2021/01/19
- [PATCH v8 02/10] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset(), Bin Meng, 2021/01/19
- [PATCH v8 03/10] hw/ssi: imx_spi: Remove pointless variable initialization, Bin Meng, 2021/01/19
- [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Bin Meng, 2021/01/19
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Peter Maydell, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Bin Meng, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value,
Peter Maydell <=
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Bin Meng, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Peter Maydell, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Peter Maydell, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Bin Meng, 2021/01/28
[PATCH v8 05/10] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled, Bin Meng, 2021/01/19
[PATCH v8 07/10] hw/ssi: imx_spi: Disable chip selects when controller is disabled, Bin Meng, 2021/01/19
[PATCH v8 06/10] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled, Bin Meng, 2021/01/19