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Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CON
From: |
Peter Maydell |
Subject: |
Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value |
Date: |
Thu, 28 Jan 2021 14:22:27 +0000 |
On Thu, 28 Jan 2021 at 14:18, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> On 1/28/21 2:54 PM, Peter Maydell wrote:
> > On Thu, 28 Jan 2021 at 13:47, Bin Meng <bmeng.cn@gmail.com> wrote:
> >>
> >> On Thu, Jan 28, 2021 at 9:43 PM Peter Maydell <peter.maydell@linaro.org>
> >> wrote:
> >>> This retains the CONREG register value for both:
> >>> * 'soft' reset caused by write to device register to disable
> >>> the block
> >>> -- this is corrcet as per the datasheet quote
> >>> * 'power on' reset via TYPE_DEVICE's reset method
> >>> -- but in this case we should reset CONREG, because the Device
> >>> reset method is like a complete device powercycle and should
> >>> return the device state to what it was when QEMU was first
> >>> started.
> >>
> >> The POR value of CONREG is zero, which should be the default value, no?
> >
> > But you're not setting it to zero here, you're leaving it with
> > whatever value it had before. (That's correct for soft reset,
> > but wrong for power-on.)
>
> zero value on power-on is what I tried to describe as
> "It is initialized to zero when the instance is created."
Yes, but QOM device reset does not happen just once at startup and
not thereafter. Consider:
* user starts QEMU
* QOM devices are created and realized
* QOM device reset happens
-- CONREG is zero here because QOM structs are zero-initialized
* guest runs
* guest modifies CONREG from its initial value
* system reset is requested (perhaps by user, perhaps by
guest writing some register or another)
* QOM device reset happens
-- CONREG is not zero here, so reset must clear it
thanks
-- PMM
- [PATCH v8 01/10] hw/ssi: imx_spi: Use a macro for number of chip selects supported, (continued)
- [PATCH v8 01/10] hw/ssi: imx_spi: Use a macro for number of chip selects supported, Bin Meng, 2021/01/19
- [PATCH v8 02/10] hw/ssi: imx_spi: Remove imx_spi_update_irq() in imx_spi_reset(), Bin Meng, 2021/01/19
- [PATCH v8 03/10] hw/ssi: imx_spi: Remove pointless variable initialization, Bin Meng, 2021/01/19
- [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Bin Meng, 2021/01/19
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Peter Maydell, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Bin Meng, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Peter Maydell, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Bin Meng, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value,
Peter Maydell <=
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Peter Maydell, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/28
- Re: [PATCH v8 04/10] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Bin Meng, 2021/01/28
[PATCH v8 05/10] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled, Bin Meng, 2021/01/19
[PATCH v8 07/10] hw/ssi: imx_spi: Disable chip selects when controller is disabled, Bin Meng, 2021/01/19
[PATCH v8 06/10] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled, Bin Meng, 2021/01/19
[PATCH v8 09/10] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic, Bin Meng, 2021/01/19
[PATCH v8 08/10] hw/ssi: imx_spi: Round up the burst length to be multiple of 8, Bin Meng, 2021/01/19