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[PULL 20/60] target/riscv: Use env_archcpu() in [check_]nanbox()
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 20/60] target/riscv: Use env_archcpu() in [check_]nanbox() |
Date: |
Mon, 6 Nov 2023 12:02:52 +0100 |
When CPUArchState* is available (here CPURISCVState*), we
can use the fast env_archcpu() macro to get ArchCPU* (here
RISCVCPU*). The QOM cast RISCV_CPU() macro will be slower
when building with --enable-qom-cast-debug.
Inspired-by: Richard W.M. Jones <rjones@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20231009110239.66778-3-philmd@linaro.org>
---
target/riscv/internals.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/riscv/internals.h b/target/riscv/internals.h
index b5f823c7ec..8239ae83cc 100644
--- a/target/riscv/internals.h
+++ b/target/riscv/internals.h
@@ -87,7 +87,7 @@ enum {
static inline uint64_t nanbox_s(CPURISCVState *env, float32 f)
{
/* the value is sign-extended instead of NaN-boxing for zfinx */
- if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) {
+ if (env_archcpu(env)->cfg.ext_zfinx) {
return (int32_t)f;
} else {
return f | MAKE_64BIT_MASK(32, 32);
@@ -97,7 +97,7 @@ static inline uint64_t nanbox_s(CPURISCVState *env, float32 f)
static inline float32 check_nanbox_s(CPURISCVState *env, uint64_t f)
{
/* Disable NaN-boxing check when enable zfinx */
- if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) {
+ if (env_archcpu(env)->cfg.ext_zfinx) {
return (uint32_t)f;
}
@@ -113,7 +113,7 @@ static inline float32 check_nanbox_s(CPURISCVState *env,
uint64_t f)
static inline uint64_t nanbox_h(CPURISCVState *env, float16 f)
{
/* the value is sign-extended instead of NaN-boxing for zfinx */
- if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) {
+ if (env_archcpu(env)->cfg.ext_zfinx) {
return (int16_t)f;
} else {
return f | MAKE_64BIT_MASK(16, 48);
@@ -123,7 +123,7 @@ static inline uint64_t nanbox_h(CPURISCVState *env, float16
f)
static inline float16 check_nanbox_h(CPURISCVState *env, uint64_t f)
{
/* Disable nanbox check when enable zfinx */
- if (RISCV_CPU(env_cpu(env))->cfg.ext_zfinx) {
+ if (env_archcpu(env)->cfg.ext_zfinx) {
return (uint16_t)f;
}
--
2.41.0
- [PULL 10/60] target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h', (continued)
- [PULL 10/60] target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 11/60] target/ppc: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 12/60] target/riscv: Remove CPU_RESOLVING_TYPE from 'cpu-qom.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 13/60] target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 14/60] target/hexagon: Declare QOM definitions in 'cpu-qom.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 15/60] target/loongarch: Declare QOM definitions in 'cpu-qom.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 16/60] target/nios2: Declare QOM definitions in 'cpu-qom.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 17/60] target/openrisc: Declare QOM definitions in 'cpu-qom.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 18/60] target/riscv: Move TYPE_RISCV_CPU_BASE definition to 'cpu.h', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 19/60] target/ppc: Use env_archcpu() in helper_book3s_msgsndp(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 20/60] target/riscv: Use env_archcpu() in [check_]nanbox(),
Philippe Mathieu-Daudé <=
- [PULL 23/60] target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr](), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 24/60] target/i386/hvf: Use env_archcpu() in simulate_[rdmsr/wrmsr](), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 26/60] target/i386/hvf: Rename 'CPUState *cpu' variable as 'cs', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 21/60] target/s390x: Use env_archcpu() in handle_diag_308(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 27/60] target/i386/hvf: Rename 'X86CPU *x86_cpu' variable as 'cpu', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 22/60] target/xtensa: Use env_archcpu() in update_c[compare|count](), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 29/60] target/i386/monitor: synchronize cpu state for lapic info, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 25/60] target/i386/hvf: Use CPUState typedef, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 28/60] target/i386/kvm: Correct comment in kvm_cpu_realize(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 30/60] target/mips: Fix MSA BZ/BNZ opcodes displacement, Philippe Mathieu-Daudé, 2023/11/06