[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 30/60] target/mips: Fix MSA BZ/BNZ opcodes displacement
From: |
Philippe Mathieu-Daudé |
Subject: |
[PULL 30/60] target/mips: Fix MSA BZ/BNZ opcodes displacement |
Date: |
Mon, 6 Nov 2023 12:03:02 +0100 |
The PC offset is *signed*.
Cc: qemu-stable@nongnu.org
Reported-by: Sergey Evlashev <vectorchiefrocks@gmail.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1624
Fixes: c7a9ef7517 ("target/mips: Introduce decode tree bindings for MSA ASE")
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914085807.12241-1-philmd@linaro.org>
---
target/mips/tcg/msa.decode | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/mips/tcg/msa.decode b/target/mips/tcg/msa.decode
index 9575289195..4410e2a02e 100644
--- a/target/mips/tcg/msa.decode
+++ b/target/mips/tcg/msa.decode
@@ -31,8 +31,8 @@
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r
@ldst ...... sa:s10 ws:5 wd:5 .... df:2 &msa_i
-@bz_v ...... ... .. wt:5 sa:16 &msa_bz df=3
-@bz ...... ... df:2 wt:5 sa:16 &msa_bz
+@bz_v ...... ... .. wt:5 sa:s16 &msa_bz df=3
+@bz ...... ... df:2 wt:5 sa:s16 &msa_bz
@elm_df ...... .... ...... ws:5 wd:5 ...... &msa_elm_df
df=%elm_df n=%elm_n
@elm ...... .......... ws:5 wd:5 ...... &msa_elm
@vec ...... ..... wt:5 ws:5 wd:5 ...... &msa_r df=0
--
2.41.0
- [PULL 20/60] target/riscv: Use env_archcpu() in [check_]nanbox(), (continued)
- [PULL 20/60] target/riscv: Use env_archcpu() in [check_]nanbox(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 23/60] target/i386/hvf: Use x86_cpu in simulate_[rdmsr|wrmsr](), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 24/60] target/i386/hvf: Use env_archcpu() in simulate_[rdmsr/wrmsr](), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 26/60] target/i386/hvf: Rename 'CPUState *cpu' variable as 'cs', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 21/60] target/s390x: Use env_archcpu() in handle_diag_308(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 27/60] target/i386/hvf: Rename 'X86CPU *x86_cpu' variable as 'cpu', Philippe Mathieu-Daudé, 2023/11/06
- [PULL 22/60] target/xtensa: Use env_archcpu() in update_c[compare|count](), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 29/60] target/i386/monitor: synchronize cpu state for lapic info, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 25/60] target/i386/hvf: Use CPUState typedef, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 28/60] target/i386/kvm: Correct comment in kvm_cpu_realize(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 30/60] target/mips: Fix MSA BZ/BNZ opcodes displacement,
Philippe Mathieu-Daudé <=
- [PULL 31/60] target/mips: Fix TX79 LQ/SQ opcodes, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 32/60] sysemu/kvm: Restrict kvmppc_get_radix_page_info() to ppc targets, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 33/60] hw/ppc/e500: Restrict ppce500_init_mpic_kvm() to KVM, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 34/60] target/ppc: Restrict KVM objects to system emulation, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 35/60] target/ppc: Prohibit target specific KVM prototypes on user emulation, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 36/60] target/nios2: Create IRQs *after* accelerator vCPU is realized, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 37/60] target/alpha: Tidy up alpha_cpu_class_by_name(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 38/60] hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name(), Philippe Mathieu-Daudé, 2023/11/06
- [PULL 39/60] exec/cpu: Have cpu_exec_realize() return a boolean, Philippe Mathieu-Daudé, 2023/11/06
- [PULL 40/60] hw/cpu: Clean up global variable shadowing, Philippe Mathieu-Daudé, 2023/11/06