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[PATCH 05/22] hw/sd: sd: Drop sd_crc16()
From: |
Bin Meng |
Subject: |
[PATCH 05/22] hw/sd: sd: Drop sd_crc16() |
Date: |
Thu, 31 Dec 2020 19:29:53 +0800 |
From: Bin Meng <bin.meng@windriver.com>
commit f6fb1f9b319f ("sdcard: Correct CRC16 offset in sd_function_switch()")
changed the 16-bit CRC to be stored at offset 64. In fact, this CRC
calculation is completely wrong. From the original codes, it wants
to calculate the CRC16 of the first 64 bytes of sd->data[], however
passing 64 as the `width` to sd_crc16() actually counts 256 bytes
starting from the `message` for the CRC16 calculation, which is not
what we want.
Besides that, it seems exisitng sd_crc16() algorithm does not match
the SD spec, which says CRC16 is the CCITT one but the calculation
does not produce expected result. It turns out the CRC16 was never
transfered outside the sd core, as in sd_read_byte() we see:
if (sd->data_offset >= 64)
sd->state = sd_transfer_state;
Given above reaons, let's drop it.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
hw/sd/sd.c | 18 ------------------
1 file changed, 18 deletions(-)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 2036734da1..52c7217fe1 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -270,23 +270,6 @@ static uint8_t sd_crc7(const void *message, size_t width)
return shift_reg;
}
-static uint16_t sd_crc16(const void *message, size_t width)
-{
- int i, bit;
- uint16_t shift_reg = 0x0000;
- const uint16_t *msg = (const uint16_t *)message;
- width <<= 1;
-
- for (i = 0; i < width; i ++, msg ++)
- for (bit = 15; bit >= 0; bit --) {
- shift_reg <<= 1;
- if ((shift_reg >> 15) ^ ((*msg >> bit) & 1))
- shift_reg ^= 0x1011;
- }
-
- return shift_reg;
-}
-
#define OCR_POWER_DELAY_NS 500000 /* 0.5ms */
FIELD(OCR, VDD_VOLTAGE_WINDOW, 0, 24)
@@ -842,7 +825,6 @@ static void sd_function_switch(SDState *sd, uint32_t arg)
sd->data[16 - (i >> 1)] |= new_func << ((i % 2) * 4);
}
memset(&sd->data[17], 0, 47);
- stw_be_p(sd->data + 64, sd_crc16(sd->data, 64));
}
static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
--
2.25.1
- [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support, Bin Meng, 2020/12/31
- [PATCH 01/22] hw/block: m25p80: Add ISSI SPI flash support, Bin Meng, 2020/12/31
- [PATCH 02/22] hw/block: m25p80: Add various ISSI flash information, Bin Meng, 2020/12/31
- [PATCH 03/22] hw/sd: ssi-sd: Fix incorrect card response sequence, Bin Meng, 2020/12/31
- [PATCH 04/22] hw/sd: sd: Support CMD59 for SPI mode, Bin Meng, 2020/12/31
- [PATCH 05/22] hw/sd: sd: Drop sd_crc16(),
Bin Meng <=
- [PATCH 06/22] util: Add CRC16 (CCITT) calculation routines, Bin Meng, 2020/12/31
- [PATCH 07/22] hw/sd: ssi-sd: Suffix a data block with CRC16, Bin Meng, 2020/12/31
- [PATCH 08/22] hw/sd: ssi-sd: Support multiple block read (CMD18), Bin Meng, 2020/12/31
- [PATCH 09/22] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer, Bin Meng, 2020/12/31
- [PATCH 11/22] hw/sd: sd: Allow single/multiple block write for SPI mode, Bin Meng, 2020/12/31
- [PATCH 14/22] hw/sd: ssi-sd: Support single block write, Bin Meng, 2020/12/31
- [PATCH 10/22] hw/sd: sd: Remove duplicated codes in single/multiple block read/write, Bin Meng, 2020/12/31
- [PATCH 12/22] hw/sd: sd.h: Cosmetic change of using spaces, Bin Meng, 2020/12/31
- [PATCH 13/22] hw/sd: Introduce receive_ready() callback, Bin Meng, 2020/12/31
- [PATCH 15/22] hw/sd: ssi-sd: Support multiple block write, Bin Meng, 2020/12/31