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[Qemu-devel] [PATCH qom-cpu v2 28/40] target-ppc: Use PowerPCCPU in Powe
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH qom-cpu v2 28/40] target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook |
Date: |
Mon, 10 Mar 2014 01:15:37 +0100 |
Signed-off-by: Andreas Färber <address@hidden>
---
target-ppc/cpu-qom.h | 8 +++++---
target-ppc/mmu-hash32.c | 5 +++--
target-ppc/mmu-hash32.h | 2 +-
target-ppc/mmu-hash64.c | 5 +++--
target-ppc/mmu-hash64.h | 2 +-
target-ppc/mmu_helper.c | 2 +-
6 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h
index b17c024..47dc8e6 100644
--- a/target-ppc/cpu-qom.h
+++ b/target-ppc/cpu-qom.h
@@ -38,6 +38,8 @@
#define POWERPC_CPU_GET_CLASS(obj) \
OBJECT_GET_CLASS(PowerPCCPUClass, (obj), TYPE_POWERPC_CPU)
+typedef struct PowerPCCPU PowerPCCPU;
+
/**
* PowerPCCPUClass:
* @parent_realize: The parent class' realize handler.
@@ -71,7 +73,7 @@ typedef struct PowerPCCPUClass {
void (*init_proc)(CPUPPCState *env);
int (*check_pow)(CPUPPCState *env);
#if defined(CONFIG_SOFTMMU)
- int (*handle_mmu_fault)(CPUPPCState *env, target_ulong eaddr, int rwx,
+ int (*handle_mmu_fault)(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
int mmu_idx);
#endif
} PowerPCCPUClass;
@@ -83,14 +85,14 @@ typedef struct PowerPCCPUClass {
*
* A PowerPC CPU.
*/
-typedef struct PowerPCCPU {
+struct PowerPCCPU {
/*< private >*/
CPUState parent_obj;
/*< public >*/
CPUPPCState env;
int cpu_dt_id;
-} PowerPCCPU;
+};
static inline PowerPCCPU *ppc_env_get_cpu(CPUPPCState *env)
{
diff --git a/target-ppc/mmu-hash32.c b/target-ppc/mmu-hash32.c
index aa87084..6a4d6a8 100644
--- a/target-ppc/mmu-hash32.c
+++ b/target-ppc/mmu-hash32.c
@@ -381,10 +381,11 @@ static hwaddr ppc_hash32_pte_raddr(target_ulong sr,
ppc_hash_pte32_t pte,
return (rpn & ~mask) | (eaddr & mask);
}
-int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr, int rwx,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr, int rwx,
int mmu_idx)
{
- CPUState *cs = CPU(ppc_env_get_cpu(env));
+ CPUState *cs = CPU(cpu);
+ CPUPPCState *env = &cpu->env;
target_ulong sr;
hwaddr pte_offset;
ppc_hash_pte32_t pte;
diff --git a/target-ppc/mmu-hash32.h b/target-ppc/mmu-hash32.h
index e193a6d..d515d4f 100644
--- a/target-ppc/mmu-hash32.h
+++ b/target-ppc/mmu-hash32.h
@@ -5,7 +5,7 @@
hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash);
hwaddr ppc_hash32_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
-int ppc_hash32_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+int ppc_hash32_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
int mmu_idx);
/*
diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 7186c0d..98cfb35 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -454,10 +454,11 @@ static hwaddr ppc_hash64_pte_raddr(ppc_slb_t *slb,
ppc_hash_pte64_t pte,
return (rpn & ~mask) | (eaddr & mask);
}
-int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong eaddr,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong eaddr,
int rwx, int mmu_idx)
{
- CPUState *cs = CPU(ppc_env_get_cpu(env));
+ CPUState *cs = CPU(cpu);
+ CPUPPCState *env = &cpu->env;
ppc_slb_t *slb;
hwaddr pte_offset;
ppc_hash_pte64_t pte;
diff --git a/target-ppc/mmu-hash64.h b/target-ppc/mmu-hash64.h
index 26f7341..49e385d 100644
--- a/target-ppc/mmu-hash64.h
+++ b/target-ppc/mmu-hash64.h
@@ -7,7 +7,7 @@
void dump_slb(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env);
int ppc_store_slb (CPUPPCState *env, target_ulong rb, target_ulong rs);
hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr);
-int ppc_hash64_handle_mmu_fault(CPUPPCState *env, target_ulong address, int rw,
+int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, target_ulong address, int rw,
int mmu_idx);
void ppc_hash64_store_hpte(CPUPPCState *env, target_ulong index,
target_ulong pte0, target_ulong pte1);
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 2a94f3d..c75b4f2 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -2902,7 +2902,7 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
is_write, int mmu_idx,
int ret;
if (pcc->handle_mmu_fault) {
- ret = pcc->handle_mmu_fault(env, addr, is_write, mmu_idx);
+ ret = pcc->handle_mmu_fault(cpu, addr, is_write, mmu_idx);
} else {
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, mmu_idx);
}
--
1.8.4.5
- Re: [Qemu-devel] [PATCH qom-cpu v2 21/40] cpu-exec: Change cpu_loop_exit() argument to CPUState, (continued)
- [Qemu-devel] [PATCH qom-cpu v2 22/40] translate-all: Change cpu_restore_state() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 23/40] translate-all: Change cpu_restore_state_from_tb() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 25/40] translate-all: Change cpu_io_recompile() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 26/40] translate-all: Change tb_gen_code() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 27/40] translate-all: Change tb_flush_jmp_cache() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 24/40] translate-all: Change tb_check_watchpoint() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 29/40] exec: Change cpu_watchpoint_{insert, remove{, _by_ref, _all}} argument, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 28/40] target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook,
Andreas Färber <=
- [Qemu-devel] [PATCH qom-cpu v2 30/40] exec: Change cpu_breakpoint_{insert, remove{, _by_ref, _all}} argument, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 31/40] cpu-exec: Change cpu_resume_from_signal() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 32/40] cputlb: Change tlb_unprotect_code_phys() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 33/40] exec: Change memory_region_section_get_iotlb() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 34/40] exec: Change cpu_abort() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 35/40] target-cris: Replace DisasContext::env field with CRISCPU, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 36/40] target-microblaze: Replace DisasContext::env field with MicroBlazeCPU, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 37/40] cputlb: Change tlb_flush_page() argument to CPUState, Andreas Färber, 2014/03/09
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