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[Qemu-devel] [PATCH qom-cpu v2 35/40] target-cris: Replace DisasContext:
From: |
Andreas Färber |
Subject: |
[Qemu-devel] [PATCH qom-cpu v2 35/40] target-cris: Replace DisasContext::env field with CRISCPU |
Date: |
Mon, 10 Mar 2014 01:15:44 +0100 |
This cleans up repeated cris_env_get_cpu() for cpu_abort().
Signed-off-by: Andreas Färber <address@hidden>
---
target-cris/translate.c | 16 ++++++++--------
target-cris/translate_v10.c | 16 ++++++++--------
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 3e26b9b..724f920 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -74,7 +74,7 @@ static TCGv env_pc;
/* This is the state at translation time. */
typedef struct DisasContext {
- CPUCRISState *env;
+ CRISCPU *cpu;
target_ulong pc, ppc;
/* Decoder. */
@@ -129,7 +129,7 @@ static void gen_BUG(DisasContext *dc, const char *file, int
line)
{
printf("BUG: pc=%x %s %d\n", dc->pc, file, line);
qemu_log("BUG: pc=%x %s %d\n", dc->pc, file, line);
- cpu_abort(CPU(cris_env_get_cpu(dc->env)), "%s:%d\n", file, line);
+ cpu_abort(CPU(dc->cpu), "%s:%d\n", file, line);
}
static const char *regnames[] =
@@ -272,7 +272,7 @@ static int cris_fetch(CPUCRISState *env, DisasContext *dc,
uint32_t addr,
break;
}
default:
- cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Invalid fetch size %d\n",
size);
+ cpu_abort(CPU(dc->cpu), "Invalid fetch size %d\n", size);
break;
}
return r;
@@ -1125,7 +1125,7 @@ static inline void cris_prepare_jmp (DisasContext *dc,
unsigned int type)
static void gen_load64(DisasContext *dc, TCGv_i64 dst, TCGv addr)
{
- int mem_index = cpu_mmu_index(dc->env);
+ int mem_index = cpu_mmu_index(&dc->cpu->env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
@@ -1139,7 +1139,7 @@ static void gen_load64(DisasContext *dc, TCGv_i64 dst,
TCGv addr)
static void gen_load(DisasContext *dc, TCGv dst, TCGv addr,
unsigned int size, int sign)
{
- int mem_index = cpu_mmu_index(dc->env);
+ int mem_index = cpu_mmu_index(&dc->cpu->env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
@@ -1154,7 +1154,7 @@ static void gen_load(DisasContext *dc, TCGv dst, TCGv
addr,
static void gen_store (DisasContext *dc, TCGv addr, TCGv val,
unsigned int size)
{
- int mem_index = cpu_mmu_index(dc->env);
+ int mem_index = cpu_mmu_index(&dc->cpu->env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
@@ -3170,7 +3170,7 @@ gen_intermediate_code_internal(CRISCPU *cpu,
TranslationBlock *tb,
* delayslot, like in real hw.
*/
pc_start = tb->pc & ~1;
- dc->env = env;
+ dc->cpu = cpu;
dc->tb = tb;
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
@@ -3391,7 +3391,7 @@ gen_intermediate_code_internal(CRISCPU *cpu,
TranslationBlock *tb,
#if !DISAS_CRIS
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
log_target_disas(env, pc_start, dc->pc - pc_start,
- dc->env->pregs[PR_VR]);
+ env->pregs[PR_VR]);
qemu_log("\nisize=%d osize=%td\n",
dc->pc - pc_start, tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf);
}
diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c
index 3f27456..2ad2b14 100644
--- a/target-cris/translate_v10.c
+++ b/target-cris/translate_v10.c
@@ -96,7 +96,7 @@ static void gen_store_v10_conditional(DisasContext *dc, TCGv
addr, TCGv val,
static void gen_store_v10(DisasContext *dc, TCGv addr, TCGv val,
unsigned int size)
{
- int mem_index = cpu_mmu_index(dc->env);
+ int mem_index = cpu_mmu_index(&dc->cpu->env);
/* If we get a fault on a delayslot we must keep the jmp state in
the cpu-state to be able to re-execute the jmp. */
@@ -340,7 +340,7 @@ static unsigned int dec10_quick_imm(DisasContext *dc)
default:
LOG_DIS("pc=%x mode=%x quickimm %d r%d r%d\n",
dc->pc, dc->mode, dc->opcode, dc->src, dc->dst);
- cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled quickimm\n");
+ cpu_abort(CPU(dc->cpu), "Unhandled quickimm\n");
break;
}
return 2;
@@ -651,7 +651,7 @@ static unsigned int dec10_reg(DisasContext *dc)
case 2: tmp = 1; break;
case 1: tmp = 0; break;
default:
- cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled
BIAP");
+ cpu_abort(CPU(dc->cpu), "Unhandled BIAP");
break;
}
@@ -669,7 +669,7 @@ static unsigned int dec10_reg(DisasContext *dc)
default:
LOG_DIS("pc=%x reg %d r%d r%d\n", dc->pc,
dc->opcode, dc->src, dc->dst);
- cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled opcode");
+ cpu_abort(CPU(dc->cpu), "Unhandled opcode");
break;
}
} else {
@@ -745,7 +745,7 @@ static unsigned int dec10_reg(DisasContext *dc)
default:
LOG_DIS("pc=%x reg %d r%d r%d\n", dc->pc,
dc->opcode, dc->src, dc->dst);
- cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled opcode");
+ cpu_abort(CPU(dc->cpu), "Unhandled opcode");
break;
}
}
@@ -1006,7 +1006,7 @@ static int dec10_bdap_m(CPUCRISState *env, DisasContext
*dc, int size)
if (!dc->postinc && (dc->ir & (1 << 11))) {
int simm = dc->ir & 0xff;
- /* cpu_abort(dc->env, "Unhandled opcode"); */
+ /* cpu_abort(CPU(dc->cpu), "Unhandled opcode"); */
/* sign extended. */
simm = (int8_t)simm;
@@ -1105,7 +1105,7 @@ static unsigned int dec10_ind(CPUCRISState *env,
DisasContext *dc)
default:
LOG_DIS("pc=%x var-ind.%d %d r%d r%d\n",
dc->pc, size, dc->opcode, dc->src, dc->dst);
- cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled opcode");
+ cpu_abort(CPU(dc->cpu), "Unhandled opcode");
break;
}
return insn_len;
@@ -1198,7 +1198,7 @@ static unsigned int dec10_ind(CPUCRISState *env,
DisasContext *dc)
break;
default:
LOG_DIS("ERROR pc=%x opcode=%d\n", dc->pc, dc->opcode);
- cpu_abort(CPU(cris_env_get_cpu(dc->env)), "Unhandled opcode");
+ cpu_abort(CPU(dc->cpu), "Unhandled opcode");
break;
}
--
1.8.4.5
- [Qemu-devel] [PATCH qom-cpu v2 24/40] translate-all: Change tb_check_watchpoint() argument to CPUState, (continued)
- [Qemu-devel] [PATCH qom-cpu v2 24/40] translate-all: Change tb_check_watchpoint() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 29/40] exec: Change cpu_watchpoint_{insert, remove{, _by_ref, _all}} argument, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 28/40] target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 30/40] exec: Change cpu_breakpoint_{insert, remove{, _by_ref, _all}} argument, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 31/40] cpu-exec: Change cpu_resume_from_signal() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 32/40] cputlb: Change tlb_unprotect_code_phys() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 33/40] exec: Change memory_region_section_get_iotlb() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 34/40] exec: Change cpu_abort() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 35/40] target-cris: Replace DisasContext::env field with CRISCPU,
Andreas Färber <=
- [Qemu-devel] [PATCH qom-cpu v2 36/40] target-microblaze: Replace DisasContext::env field with MicroBlazeCPU, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 37/40] cputlb: Change tlb_flush_page() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 38/40] cputlb: Change tlb_flush() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 39/40] cputlb: Change tlb_set_page() argument to CPUState, Andreas Färber, 2014/03/09
- [Qemu-devel] [PATCH qom-cpu v2 40/40] user-exec: Change exception_action() argument to CPUState, Andreas Färber, 2014/03/09