[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v4 06/21] target-arm: Provide syndrome informati
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v4 06/21] target-arm: Provide syndrome information for MMU faults |
Date: |
Mon, 17 Mar 2014 12:50:29 +0000 |
On 17 March 2014 12:41, Peter Maydell <address@hidden> wrote:
> On 17 March 2014 03:28, Peter Crosthwaite <address@hidden> wrote:
>> On Fri, Mar 7, 2014 at 5:32 AM, Peter Maydell <address@hidden> wrote:
>>> From: Rob Herring <address@hidden>
>
>>> + /* Set bit 26 for exceptions with no change in EL */
>>> + if (arm_current_pl(env)) {
>>> + syn |= 1 << ARM_EL_EC_SHIFT;
>>> + }
>>> +
>>
>> Perhaps in internals.h:
>>
>> #define ARM_EL_EC_SAME_LEVEL (1 << ARM_EL_EC_SHIFT)
>>
>> Then this becomes:
>>
>> syn |= ARM_EL_EC_SAME_LEVEL
>>
>> Then in internals.h you can be more self documenting with:
>>
>> EC_BREAKPOINT_SAME_EL = EC_BREAKPOINT | ARM_EL_EC_SAME_LEVEL
>
> Yeah, seems reasonable.
On the other hand you can't define EC_BREAKPOINT_SAME_EL
like that, because the EC_ enum values aren't shifted.
Perhaps it would be better to have the syn_* functions for
the EC values which have SAME_EL versions (currently just
insn abort and data abort, since we don't implement any
of the hardware debug exceptions) have an extra parameter
bool same_el, and have the syn_ function OR in the extra bit.
thanks
-- PMM
[Qemu-devel] [PATCH v4 14/21] target-arm: Implement AArch64 views of fault status and data registers, Peter Maydell, 2014/03/06
[Qemu-devel] [PATCH v4 01/21] target-arm: Split out private-to-target functions into internals.h, Peter Maydell, 2014/03/06
[Qemu-devel] [PATCH v4 20/21] target-arm: Add Cortex-A57 processor, Peter Maydell, 2014/03/06
[Qemu-devel] [PATCH v4 03/21] target-arm: Define exception record for AArch64 exceptions, Peter Maydell, 2014/03/06