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[Qemu-devel] [PATCH v5 25/37] target-arm: Implement AArch64 view of ACTL
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH v5 25/37] target-arm: Implement AArch64 view of ACTLR |
Date: |
Fri, 28 Mar 2014 16:10:12 +0000 |
Implement the AArch64 view of the ACTLR (auxiliary control
register). Note that QEMU internally tends to call this
AUXCR for historical reasons.
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/helper.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 10300aa..f2e6f17 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2316,7 +2316,8 @@ void register_cp_regs_for_features(ARMCPU *cpu)
if (arm_feature(env, ARM_FEATURE_AUXCR)) {
ARMCPRegInfo auxcr = {
- .name = "AUXCR", .cp = 15, .crn = 1, .crm = 0, .opc1 = 0, .opc2 =
1,
+ .name = "AUXCR", .state = ARM_CP_STATE_BOTH,
+ .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 1,
.access = PL1_RW, .type = ARM_CP_CONST,
.resetvalue = cpu->reset_auxcr
};
--
1.9.0
- [Qemu-devel] [PATCH v5 00/37] AArch64 system emulation, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 22/37] hw/arm/virt: Add support for Cortex-A57, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 34/37] target-arm: Implement CBAR for Cortex-A57, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 16/37] target-arm: Implement SP_EL0, SP_EL1, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 10/37] target-arm: Add v8 mmu translation support, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 32/37] target-arm: Implement RVBAR register, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 25/37] target-arm: Implement AArch64 view of ACTLR,
Peter Maydell <=
- [Qemu-devel] [PATCH v5 24/37] target-arm: Implement AArch64 view of CONTEXTIDR, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 01/37] target-arm: Split out private-to-target functions into internals.h, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 15/37] target-arm: Add AArch64 ELR_EL1 register., Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 35/37] target-arm: Make Cortex-A15 CBAR read-only, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 04/37] target-arm: Provide correct syndrome information for cpreg access traps, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 03/37] target-arm: Define exception record for AArch64 exceptions, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 28/37] target-arm: Don't expose wildcard ID register definitions for ARMv8, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 07/37] target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 37/37] target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32, Peter Maydell, 2014/03/28
- [Qemu-devel] [PATCH v5 29/37] target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8, Peter Maydell, 2014/03/28