[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 0/3] arm_gic: Improve handling of GICD_ICFGR
From: |
Christoffer Dall |
Subject: |
Re: [Qemu-devel] [PATCH 0/3] arm_gic: Improve handling of GICD_ICFGR |
Date: |
Sun, 3 Aug 2014 21:36:21 +0200 |
On 3 August 2014 15:21, Peter Maydell <address@hidden> wrote:
> On 3 August 2014 09:53, Adam Lackorzynski <address@hidden> wrote:
>> Hi,
>>
>> the following three patches address the behavior of the GICD_ICFGR register
>> in the ARM GIC.
>>
>> Adam Lackorzynski (3):
>> arm_gic: Fix read of GICD_ICFGR
>> arm_gic: SGIs for GICD_ICFGR are WI
>> arm_gic: GICD_ICFGR: Do not force edge-triggered PPIs
>>
>> hw/intc/arm_gic.c | 15 ++++++++-------
>> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> Christoffer, did you want to review these? (I'll have a look through
> them too shortly.)
>
Yeah, I'll have a look some time this week if that's timely enough?
-Christoffer
[Qemu-devel] [PATCH 2/3] arm_gic: GICD_ICFGR: Write model only for pre v1 GICs, Adam Lackorzynski, 2014/08/16