[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v2 RESEND 1/5] apic: Implement LAPIC low priority ar
From: |
James Sullivan |
Subject: |
[Qemu-devel] [PATCH v2 RESEND 1/5] apic: Implement LAPIC low priority arbitration functions |
Date: |
Mon, 6 Apr 2015 17:45:33 -0600 |
Currently, apic_get_arb_pri() is unimplemented and returns 0.
Implemented apic_get_arb_pri() and added two helper functions
apic_compare_prio() and apic_lowest_prio() to be used for LAPIC
arbitration.
Signed-off-by: James Sullivan <address@hidden>
---
hw/intc/apic.c | 47 +++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 45 insertions(+), 2 deletions(-)
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 0f97b47..b372513 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -38,6 +38,7 @@ static void apic_set_irq(APICCommonState *s, int vector_num,
int trigger_mode);
static void apic_update_irq(APICCommonState *s);
static void apic_get_delivery_bitmask(uint32_t *deliver_bitmask,
uint8_t dest, uint8_t dest_mode);
+static int apic_get_arb_pri(APICCommonState *s);
/* Find first bit starting from msb */
static int apic_fls_bit(uint32_t value)
@@ -199,6 +200,29 @@ static void apic_external_nmi(APICCommonState *s)
apic_local_deliver(s, APIC_LVT_LINT1);
}
+static int apic_compare_prio(struct APICCommonState *cpu1,
+ struct APICCommonState *cpu2)
+{
+ return apic_get_arb_pri(cpu1) - apic_get_arb_pri(cpu2);
+}
+
+static struct APICCommonState *apic_lowest_prio(const uint32_t
+ *deliver_bitmask)
+{
+ APICCommonState *lowest = NULL;
+ int i, d;
+
+ for (i = 0; i < MAX_APIC_WORDS; i++) {
+ if (deliver_bitmask[i]) {
+ d = i * 32 + apic_ffs_bit(deliver_bitmask[i]);
+ if (!lowest || apic_compare_prio(local_apics[d], lowest) < 0) {
+ lowest = local_apics[d];
+ }
+ }
+ }
+ return lowest;
+}
+
#define foreach_apic(apic, deliver_bitmask, code) \
{\
int __i, __j;\
@@ -336,8 +360,27 @@ static int apic_get_ppr(APICCommonState *s)
static int apic_get_arb_pri(APICCommonState *s)
{
- /* XXX: arbitration */
- return 0;
+ int tpr, isrv, irrv, apr;
+
+ tpr = apic_get_tpr(s);
+ isrv = get_highest_priority_int(s->isr);
+ if (isrv < 0) {
+ isrv = 0;
+ }
+ isrv >>= 4;
+ irrv = get_highest_priority_int(s->irr);
+ if (irrv < 0) {
+ irrv = 0;
+ }
+ irrv >>= 4;
+
+ if ((tpr >= irrv) && (tpr > isrv)) {
+ apr = s->tpr & 0xff;
+ } else {
+ apr = ((tpr & isrv) > irrv) ? (tpr & isrv) : irrv;
+ apr <<= 4;
+ }
+ return apr;
}
--
2.3.4
- [Qemu-devel] [PATCH v2 RESEND 0/5] apic: Implement MSI RH bit handling, lowpri IRQ, James Sullivan, 2015/04/06
- [Qemu-devel] [PATCH v2 RESEND 1/5] apic: Implement LAPIC low priority arbitration functions,
James Sullivan <=
- [Qemu-devel] [PATCH v2 RESEND 2/5] apic: Implement low priority arbitration for IRQ delivery, James Sullivan, 2015/04/06
- [Qemu-devel] [PATCH v2 RESEND 3/5] apic: Added helper function apic_match_dest, apic_match_[physical, logical]_dest, James Sullivan, 2015/04/06
- [Qemu-devel] [PATCH v2 RESEND 4/5] apic: Set and pass in RH bit for MSI interrupts, James Sullivan, 2015/04/06
- [Qemu-devel] [PATCH v2 RESEND 5/5] apic: Implement handling of RH=1 for MSI interrupt delivery, James Sullivan, 2015/04/06