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[Qemu-devel] [PATCH v2 RESEND 3/5] apic: Added helper function apic_matc
From: |
James Sullivan |
Subject: |
[Qemu-devel] [PATCH v2 RESEND 3/5] apic: Added helper function apic_match_dest, apic_match_[physical, logical]_dest |
Date: |
Mon, 6 Apr 2015 17:45:35 -0600 |
Added three helper functions apic_match_dest(),
apic_match_physical_dest(), and apic_match_logical_dest() which
can be used to determine if a logical or physical APIC ID match a
given LAPIC under a given dest_mode. This does not account for shorthand.
Signed-off-by: James Sullivan <address@hidden>
---
hw/intc/apic.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/hw/intc/apic.c b/hw/intc/apic.c
index 47d2fb1..c49eb26 100644
--- a/hw/intc/apic.c
+++ b/hw/intc/apic.c
@@ -241,6 +241,32 @@ static struct APICCommonState *apic_lowest_prio(const
uint32_t
}\
}
+static bool apic_match_physical_dest(struct APICCommonState *apic, uint8_t
dest)
+{
+ return (dest == 0xff || apic->id == dest);
+}
+
+static bool apic_match_logical_dest(struct APICCommonState *apic, uint8_t dest)
+{
+ if (apic->dest_mode == 0xf) {
+ return (dest & apic->log_dest) > 0;
+ } else if (apic->dest_mode == 0) {
+ return ((dest & 0xf0) == (apic->log_dest & 0xf0)) &&
+ (dest & apic->log_dest & 0x0f) > 0;
+ }
+ return false;
+}
+
+static bool apic_match_dest(struct APICCommonState *apic, uint8_t dest_mode,
+ uint8_t dest)
+{
+ if (dest_mode == 0) {
+ return apic_match_physical_dest(apic, dest);
+ } else {
+ return apic_match_logical_dest(apic, dest);
+ }
+}
+
static void apic_bus_deliver(const uint32_t *deliver_bitmask,
uint8_t delivery_mode, uint8_t vector_num,
uint8_t trigger_mode)
--
2.3.4
- [Qemu-devel] [PATCH v2 RESEND 0/5] apic: Implement MSI RH bit handling, lowpri IRQ, James Sullivan, 2015/04/06
- [Qemu-devel] [PATCH v2 RESEND 2/5] apic: Implement low priority arbitration for IRQ delivery, James Sullivan, 2015/04/06
- [Qemu-devel] [PATCH v2 RESEND 3/5] apic: Added helper function apic_match_dest, apic_match_[physical, logical]_dest,
James Sullivan <=
- [Qemu-devel] [PATCH v2 RESEND 4/5] apic: Set and pass in RH bit for MSI interrupts, James Sullivan, 2015/04/06
- [Qemu-devel] [PATCH v2 RESEND 5/5] apic: Implement handling of RH=1 for MSI interrupt delivery, James Sullivan, 2015/04/06