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Re: [Qemu-devel] [PATCH 1/7] target/mips: Add MXU register support
From: |
Aleksandar Markovic |
Subject: |
Re: [Qemu-devel] [PATCH 1/7] target/mips: Add MXU register support |
Date: |
Mon, 27 Aug 2018 12:35:53 +0000 |
> From: Craig Janeczek <address@hidden>
> Sent: Friday, August 24, 2018 9:44 PM
>
> Subject: [PATCH 1/7] target/mips: Add MXU register support
>
> This commit makes the MXU registers and the helper functions for
> reading/writing to them. This is required for full MXU instruction
> support.
Hi, Craig,
The term "helper function" is good in general terminology sense, however, in
QEMU terminology, it is used for something else (see op_helper.c for examples),
and not for the case similar to the functions in this patch. Your functions
generate "inline" code, in QEMU terminology, which is opposite to "helper"
functions. Just don't use the word "helper" in the commit message. Use
"wrapper", "utility", or similar word.
Thanks,
Aleksandar
- [Qemu-devel] [PATCH 0/7] Add limited MXU instruction support, Craig Janeczek, 2018/08/24
- [Qemu-devel] [PATCH 6/7] target/mips: Add MXU instructions Q8MUL and Q8MULSU, Craig Janeczek, 2018/08/24
- [Qemu-devel] [PATCH 2/7] target/mips: Add MXU instructions S32I2M and S32M2I, Craig Janeczek, 2018/08/24
- [Qemu-devel] [PATCH 1/7] target/mips: Add MXU register support, Craig Janeczek, 2018/08/24
- [Qemu-devel] [PATCH 4/7] target/mips: Add MXU instruction D16MUL, Craig Janeczek, 2018/08/24
- [Qemu-devel] [PATCH 3/7] target/mips: Add MXU instruction S8LDD, Craig Janeczek, 2018/08/24
- [Qemu-devel] [PATCH 7/7] target/mips: Add MXU instructions S32LDD and S32LDDR, Craig Janeczek, 2018/08/24
- [Qemu-devel] [PATCH 5/7] target/mips: Add MXU instruction D16MAC, Craig Janeczek, 2018/08/24