[Bug 1862167] [NEW] Variation of SVE register size (qemu-user-aarch64)

[Kentaro Kawakami]

Public bug reported:

Specification of ARMv8-A SVE extention allows various values ​​for the
size of the SVE register. On the other hand, it seems that the current
qemu-aarch64 supports only the maximum length of 2048 bits as the SVE
register size. I am writing an assembler program for a CPU that is
compliant with ARMv8-A + SVE and has a 512-bit SVE register, but when
this is run with qemu-user-aarch64, a 2048-bit load / store instruction
is executed This causes a segmentation fault. Shouldn't qeum-user-
aarch64 have an option to specify the SVE register size?

** Affects: qemu
     Importance: Undecided
         Status: New

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Title:
  Variation of SVE register size (qemu-user-aarch64)

Status in QEMU:
  New

Bug description:
  Specification of ARMv8-A SVE extention allows various values ​​for the
  size of the SVE register. On the other hand, it seems that the current
  qemu-aarch64 supports only the maximum length of 2048 bits as the SVE
  register size. I am writing an assembler program for a CPU that is
  compliant with ARMv8-A + SVE and has a 512-bit SVE register, but when
  this is run with qemu-user-aarch64, a 2048-bit load / store
  instruction is executed This causes a segmentation fault. Shouldn't
  qeum-user-aarch64 have an option to specify the SVE register size?

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