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[PULL 07/48] target/arm: Split out vae1_tlbmask
From: |
Peter Maydell |
Subject: |
[PULL 07/48] target/arm: Split out vae1_tlbmask |
Date: |
Fri, 7 Feb 2020 14:33:02 +0000 |
From: Richard Henderson <address@hidden>
No functional change, but unify code sequences.
Tested-by: Alex Bennée <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 32 +++++++++++++-------------------
1 file changed, 13 insertions(+), 19 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index dbfdf2324b4..8b3bb51dee2 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -3940,42 +3940,36 @@ static CPAccessResult aa64_cacheop_access(CPUARMState
*env,
* Page D4-1736 (DDI0487A.b)
*/
+static int vae1_tlbmask(CPUARMState *env)
+{
+ if (arm_is_secure_below_el3(env)) {
+ return ARMMMUIdxBit_S1SE1 | ARMMMUIdxBit_S1SE0;
+ } else {
+ return ARMMMUIdxBit_S12NSE1 | ARMMMUIdxBit_S12NSE0;
+ }
+}
+
static void tlbi_aa64_vmalle1is_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
CPUState *cs = env_cpu(env);
- bool sec = arm_is_secure_below_el3(env);
+ int mask = vae1_tlbmask(env);
- if (sec) {
- tlb_flush_by_mmuidx_all_cpus_synced(cs,
- ARMMMUIdxBit_S1SE1 |
- ARMMMUIdxBit_S1SE0);
- } else {
- tlb_flush_by_mmuidx_all_cpus_synced(cs,
- ARMMMUIdxBit_S12NSE1 |
- ARMMMUIdxBit_S12NSE0);
- }
+ tlb_flush_by_mmuidx_all_cpus_synced(cs, mask);
}
static void tlbi_aa64_vmalle1_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
CPUState *cs = env_cpu(env);
+ int mask = vae1_tlbmask(env);
if (tlb_force_broadcast(env)) {
tlbi_aa64_vmalle1is_write(env, NULL, value);
return;
}
- if (arm_is_secure_below_el3(env)) {
- tlb_flush_by_mmuidx(cs,
- ARMMMUIdxBit_S1SE1 |
- ARMMMUIdxBit_S1SE0);
- } else {
- tlb_flush_by_mmuidx(cs,
- ARMMMUIdxBit_S12NSE1 |
- ARMMMUIdxBit_S12NSE0);
- }
+ tlb_flush_by_mmuidx(cs, mask);
}
static void tlbi_aa64_alle1_write(CPUARMState *env, const ARMCPRegInfo *ri,
--
2.20.1
- [PULL 00/48] target-arm queue, Peter Maydell, 2020/02/07
- [PULL 01/48] target/arm/monitor: query-cpu-model-expansion crashed qemu when using machine type none, Peter Maydell, 2020/02/07
- [PULL 03/48] target/arm: Enable HCR_E2H for VHE, Peter Maydell, 2020/02/07
- [PULL 02/48] target/arm: Define isar_feature_aa64_vh, Peter Maydell, 2020/02/07
- [PULL 04/48] target/arm: Add CONTEXTIDR_EL2, Peter Maydell, 2020/02/07
- [PULL 05/48] target/arm: Add TTBR1_EL2, Peter Maydell, 2020/02/07
- [PULL 06/48] target/arm: Update CNTVCT_EL0 for VHE, Peter Maydell, 2020/02/07
- [PULL 07/48] target/arm: Split out vae1_tlbmask,
Peter Maydell <=
- [PULL 08/48] target/arm: Split out alle1_tlbmask, Peter Maydell, 2020/02/07
- [PULL 09/48] target/arm: Simplify tlb_force_broadcast alternatives, Peter Maydell, 2020/02/07
- [PULL 10/48] target/arm: Rename ARMMMUIdx*_S12NSE* to ARMMMUIdx*_E10_*, Peter Maydell, 2020/02/07
- [PULL 11/48] target/arm: Rename ARMMMUIdx_S2NS to ARMMMUIdx_Stage2, Peter Maydell, 2020/02/07
- [PULL 12/48] target/arm: Rename ARMMMUIdx_S1NSE* to ARMMMUIdx_Stage1_E*, Peter Maydell, 2020/02/07
- [PULL 13/48] target/arm: Rename ARMMMUIdx_S1SE[01] to ARMMMUIdx_SE10_[01], Peter Maydell, 2020/02/07
- [PULL 14/48] target/arm: Rename ARMMMUIdx*_S1E3 to ARMMMUIdx*_SE3, Peter Maydell, 2020/02/07
- [PULL 17/48] target/arm: Expand TBFLAG_ANY.MMUIDX to 4 bits, Peter Maydell, 2020/02/07
- [PULL 19/48] target/arm: Tidy ARMMMUIdx m-profile definitions, Peter Maydell, 2020/02/07
- [PULL 18/48] target/arm: Rearrange ARMMMUIdxBit, Peter Maydell, 2020/02/07