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Re: [PATCH v1 0/5] plugins/next
From: |
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Subject: |
Re: [PATCH v1 0/5] plugins/next |
Date: |
Fri, 7 Feb 2020 12:55:08 -0800 (PST) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [PATCH v1 0/5] plugins/next
Message-id: address@hidden
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
From https://github.com/patchew-project/qemu
* [new tag] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
41b2c3d tests/plugins: make howvec clean-up after itself.
107cac9 target/riscv: progressively load the instruction during decode
f4d9c2a tests/plugin: prevent uninitialized warning
f0c6141 plugins/core: add missing break in cb_to_tcg_flags
1b7fce4 docs/devel: document query handle lifetimes
=== OUTPUT BEGIN ===
1/5 Checking commit 1b7fce4dfde8 (docs/devel: document query handle lifetimes)
2/5 Checking commit f0c614169421 (plugins/core: add missing break in
cb_to_tcg_flags)
3/5 Checking commit f4d9c2a8daaa (tests/plugin: prevent uninitialized warning)
4/5 Checking commit 107cac90cc74 (target/riscv: progressively load the
instruction during decode)
ERROR: line over 90 characters
#110: FILE: target/riscv/translate.c:726:
+ opcode32 = deposit32(opcode32, 16, 16, translator_lduw(env,
ctx->base.pc_next + 2));
total: 1 errors, 0 warnings, 103 lines checked
Patch 4/5 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/5 Checking commit 41b2c3dc8d77 (tests/plugins: make howvec clean-up after
itself.)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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- [PATCH v1 4/5] target/riscv: progressively load the instruction during decode, (continued)