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[RFC PATCH 09/66] Hexagon architecture types
From: |
Taylor Simpson |
Subject: |
[RFC PATCH 09/66] Hexagon architecture types |
Date: |
Mon, 10 Feb 2020 18:39:47 -0600 |
Define types used in files imported from the Hexagon architecture library
Signed-off-by: Taylor Simpson <address@hidden>
---
target/hexagon/hex_arch_types.h | 42 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 target/hexagon/hex_arch_types.h
diff --git a/target/hexagon/hex_arch_types.h b/target/hexagon/hex_arch_types.h
new file mode 100644
index 0000000..3f89986
--- /dev/null
+++ b/target/hexagon/hex_arch_types.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2019 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef HEXAGON_ARCH_TYPES_H
+#define HEXAGON_ARCH_TYPES_H
+
+/*
+ * These types are used by the code generated from the Hexagon
+ * architecture library.
+ */
+typedef unsigned char size1u_t;
+typedef char size1s_t;
+typedef unsigned short int size2u_t;
+typedef short size2s_t;
+typedef unsigned int size4u_t;
+typedef int size4s_t;
+typedef unsigned long long int size8u_t;
+typedef long long int size8s_t;
+typedef size8u_t paddr_t;
+typedef size4u_t vaddr_t;
+typedef size8u_t pcycles_t;
+
+typedef struct size16s {
+ size8s_t hi;
+ size8u_t lo;
+} size16s_t;
+
+#endif
--
2.7.4
- [RFC PATCH 12/66] Hexagon register map, (continued)
- [RFC PATCH 12/66] Hexagon register map, Taylor Simpson, 2020/02/10
- [RFC PATCH 05/66] Hexagon Disassembler, Taylor Simpson, 2020/02/10
- [RFC PATCH 10/66] Hexagon register fields, Taylor Simpson, 2020/02/10
- [RFC PATCH 20/66] Hexagon generator phase 1 - C preprocessor for semantics, Taylor Simpson, 2020/02/10
- [RFC PATCH 03/66] Hexagon CPU Scalar Core Definition, Taylor Simpson, 2020/02/10
- [RFC PATCH 18/66] Hexagon instruction class definitions, Taylor Simpson, 2020/02/10
- [RFC PATCH 07/66] Hexagon GDB Stub, Taylor Simpson, 2020/02/10
- [RFC PATCH 09/66] Hexagon architecture types,
Taylor Simpson <=
- [RFC PATCH 14/66] Hexagon instruction printing, Taylor Simpson, 2020/02/10
- [RFC PATCH 08/66] Hexagon instruction and packet types, Taylor Simpson, 2020/02/10
- [RFC PATCH 26/66] Hexagon generator phase 2 - printinsn-generated.h, Taylor Simpson, 2020/02/10
- [RFC PATCH 06/66] Hexagon CPU Scalar Core Helpers, Taylor Simpson, 2020/02/10
- [RFC PATCH 24/66] Hexagon generator phase 2 - op_attribs_generated.h, Taylor Simpson, 2020/02/10
- [RFC PATCH 25/66] Hexagon generator phase 2 - op_regs_generated.h, Taylor Simpson, 2020/02/10
- [RFC PATCH 11/66] Hexagon instruction attributes, Taylor Simpson, 2020/02/10
- [RFC PATCH 28/66] Hexagon generater phase 4 - Decode tree, Taylor Simpson, 2020/02/10