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[RFC PATCH 14/66] Hexagon instruction printing
From: |
Taylor Simpson |
Subject: |
[RFC PATCH 14/66] Hexagon instruction printing |
Date: |
Mon, 10 Feb 2020 18:39:52 -0600 |
Signed-off-by: Taylor Simpson <address@hidden>
---
target/hexagon/printinsn.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++
target/hexagon/printinsn.h | 26 +++++++++++++
2 files changed, 119 insertions(+)
create mode 100644 target/hexagon/printinsn.c
create mode 100644 target/hexagon/printinsn.h
diff --git a/target/hexagon/printinsn.c b/target/hexagon/printinsn.c
new file mode 100644
index 0000000..cb1004b
--- /dev/null
+++ b/target/hexagon/printinsn.c
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2019 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <stdio.h>
+#include <string.h>
+#include "qemu/osdep.h"
+#include "opcodes.h"
+#include "printinsn.h"
+#include "insn.h"
+#include "macros.h"
+#include "internal.h"
+
+static const char *sreg2str(unsigned int reg)
+{
+ if (reg < TOTAL_PER_THREAD_REGS) {
+ return hexagon_regnames[reg];
+ } else {
+ return "???";
+ }
+}
+
+static const char *creg2str(unsigned int reg)
+{
+ return sreg2str(reg + NUM_GEN_REGS);
+}
+
+static void snprintinsn(char *buf, int n, insn_t * insn)
+{
+ switch (insn->opcode) {
+#define DEF_VECX_PRINTINFO(TAG, FMT, ...) DEF_PRINTINFO(TAG, FMT, __VA_ARGS__)
+#define DEF_PRINTINFO(TAG, FMT, ...) \
+ case TAG: \
+ snprintf(buf, n, FMT, __VA_ARGS__);\
+ break;
+#include "printinsn_generated.h"
+#undef DEF_VECX_PRINTINFO
+#undef DEF_PRINTINFO
+ }
+}
+
+void snprint_a_pkt(char *buf, int n, packet_t * pkt)
+{
+ char tmpbuf[128];
+ buf[0] = '\0';
+ int i, slot, opcode;
+
+ if (pkt == NULL) {
+ snprintf(buf, n, "<printpkt: NULL ptr>");
+ return;
+ }
+
+ if (pkt->num_insns > 1) {
+ strncat(buf, "\n{\n", n);
+ }
+ for (i = 0; i < pkt->num_insns; i++) {
+ if (pkt->insn[i].part1) {
+ continue;
+ }
+ snprintinsn(tmpbuf, 127, &(pkt->insn[i]));
+ strncat(buf, "\t", n);
+ strncat(buf, tmpbuf, n);
+ if (GET_ATTRIB(pkt->insn[i].opcode, A_SUBINSN)) {
+ strncat(buf, " //subinsn", n);
+ }
+ if (pkt->insn[i].extension_valid) {
+ strncat(buf, " //constant extended", n);
+ }
+ slot = pkt->insn[i].slot;
+ opcode = pkt->insn[i].opcode;
+ snprintf(tmpbuf, 127, " //slot=%d:tag=%s", slot, opcode_names[opcode]);
+ strncat(buf, tmpbuf, n);
+
+ strncat(buf, "\n", n);
+ }
+ if (pkt->num_insns > 1) {
+ strncat(buf, "}\n", n);
+ }
+}
+
diff --git a/target/hexagon/printinsn.h b/target/hexagon/printinsn.h
new file mode 100644
index 0000000..64af75c
--- /dev/null
+++ b/target/hexagon/printinsn.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2019 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef PRINTINSN_H
+#define PRINTINSN_H
+
+#include <stdio.h>
+#include "insn.h"
+
+extern void snprint_a_pkt(char *buf, int n, packet_t *pkt);
+
+#endif
--
2.7.4
- [RFC PATCH 05/66] Hexagon Disassembler, (continued)
- [RFC PATCH 05/66] Hexagon Disassembler, Taylor Simpson, 2020/02/10
- [RFC PATCH 10/66] Hexagon register fields, Taylor Simpson, 2020/02/10
- [RFC PATCH 20/66] Hexagon generator phase 1 - C preprocessor for semantics, Taylor Simpson, 2020/02/10
- [RFC PATCH 03/66] Hexagon CPU Scalar Core Definition, Taylor Simpson, 2020/02/10
- [RFC PATCH 18/66] Hexagon instruction class definitions, Taylor Simpson, 2020/02/10
- [RFC PATCH 07/66] Hexagon GDB Stub, Taylor Simpson, 2020/02/10
- [RFC PATCH 09/66] Hexagon architecture types, Taylor Simpson, 2020/02/10
- [RFC PATCH 14/66] Hexagon instruction printing,
Taylor Simpson <=
- [RFC PATCH 08/66] Hexagon instruction and packet types, Taylor Simpson, 2020/02/10
- [RFC PATCH 26/66] Hexagon generator phase 2 - printinsn-generated.h, Taylor Simpson, 2020/02/10
- [RFC PATCH 06/66] Hexagon CPU Scalar Core Helpers, Taylor Simpson, 2020/02/10
- [RFC PATCH 24/66] Hexagon generator phase 2 - op_attribs_generated.h, Taylor Simpson, 2020/02/10
- [RFC PATCH 25/66] Hexagon generator phase 2 - op_regs_generated.h, Taylor Simpson, 2020/02/10
- [RFC PATCH 11/66] Hexagon instruction attributes, Taylor Simpson, 2020/02/10
- [RFC PATCH 28/66] Hexagon generater phase 4 - Decode tree, Taylor Simpson, 2020/02/10